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-rw-r--r--src/soc/intel/braswell/Makefile.inc2
-rw-r--r--src/soc/intel/quark/include/soc/romstage.h2
-rw-r--r--src/soc/intel/quark/romstage/car_stage_entry.S6
-rw-r--r--src/soc/intel/quark/romstage/fsp2_0.c3
-rw-r--r--src/soc/intel/skylake/romstage/car_stage.S5
5 files changed, 7 insertions, 11 deletions
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc
index e2b1fe5295..6b466c66f8 100644
--- a/src/soc/intel/braswell/Makefile.inc
+++ b/src/soc/intel/braswell/Makefile.inc
@@ -17,6 +17,8 @@ romstage-y += pmutil.c
romstage-y += smbus.c
romstage-y += tsc_freq.c
+postcar-y += memmap.c
+postcar-y += iosf.c
postcar-y += tsc_freq.c
ramstage-y += acpi.c
diff --git a/src/soc/intel/quark/include/soc/romstage.h b/src/soc/intel/quark/include/soc/romstage.h
index fb8a844815..c7de080146 100644
--- a/src/soc/intel/quark/include/soc/romstage.h
+++ b/src/soc/intel/quark/include/soc/romstage.h
@@ -25,7 +25,7 @@
#include <soc/car.h>
#include <soc/reg_access.h>
-asmlinkage void *car_stage_c_entry(void);
+asmlinkage void car_stage_c_entry(void);
void clear_smi_and_wake_events(void);
void disable_rom_shadow(void);
void *locate_rmu_file(size_t *rmu_file_len);
diff --git a/src/soc/intel/quark/romstage/car_stage_entry.S b/src/soc/intel/quark/romstage/car_stage_entry.S
index d51587143b..c9847eaac7 100644
--- a/src/soc/intel/quark/romstage/car_stage_entry.S
+++ b/src/soc/intel/quark/romstage/car_stage_entry.S
@@ -29,12 +29,6 @@ car_stage_entry:
/* Enter the C code */
call car_stage_c_entry
-#if CONFIG(PLATFORM_USES_FSP1_1)
-#if !ENV_VERSTAGE
-#include "src/drivers/intel/fsp1_1/after_raminit.S"
-#endif
-#endif
-
/* The code should never reach this point */
movb $0x69, %ah
jmp .Lhlt
diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c
index 31e130a398..2ec16c9f34 100644
--- a/src/soc/intel/quark/romstage/fsp2_0.c
+++ b/src/soc/intel/quark/romstage/fsp2_0.c
@@ -26,7 +26,7 @@
#include <soc/reg_access.h>
#include <soc/storage_test.h>
-asmlinkage void *car_stage_c_entry(void)
+asmlinkage void car_stage_c_entry(void)
{
struct postcar_frame pcf;
bool s3wake;
@@ -83,7 +83,6 @@ asmlinkage void *car_stage_c_entry(void)
postcar_frame_add_romcache(&pcf, MTRR_TYPE_WRTHROUGH);
run_postcar_phase(&pcf);
- return NULL;
}
static struct chipset_power_state power_state CAR_GLOBAL;
diff --git a/src/soc/intel/skylake/romstage/car_stage.S b/src/soc/intel/skylake/romstage/car_stage.S
index ee04f0272d..d8b45cb258 100644
--- a/src/soc/intel/skylake/romstage/car_stage.S
+++ b/src/soc/intel/skylake/romstage/car_stage.S
@@ -13,6 +13,8 @@
* GNU General Public License for more details.
*/
+#include <cpu/x86/post_code.h>
+
/* I/O delay between post codes on failure */
#define LHLT_DELAY 0x50000
@@ -20,9 +22,8 @@
.global car_stage_entry
car_stage_entry:
call romstage_c_entry
- #include "src/drivers/intel/fsp1_1/after_raminit.S"
-
+ /* we don't return here */
movb $0x69, %ah
jmp .Lhlt