summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/skylake/chip.h3
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c1
2 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 00088b9aad..4e8cb8155d 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -542,6 +542,9 @@ struct soc_intel_skylake_config {
/* PCH Trip Temperature */
u8 pch_trip_temp;
+
+ /* Enable/Disable Sata power optimization */
+ u8 SataPwrOptEnable;
};
typedef struct soc_intel_skylake_config config_t;
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 24a239e3b5..ccda3032c5 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -219,6 +219,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->SataEnable = config->EnableSata;
params->SataMode = config->SataMode;
params->SataSpeedLimit = config->SataSpeedLimit;
+ params->SataPwrOptEnable = config->SataPwrOptEnable;
tconfig->PchLockDownGlobalSmi = config->LockDownConfigGlobalSmi;
tconfig->PchLockDownRtcLock = config->LockDownConfigRtcLock;