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-rw-r--r--src/soc/rockchip/rk3288/chip.h1
-rw-r--r--src/soc/rockchip/rk3288/display.c1
-rw-r--r--src/soc/rockchip/rk3288/edp.c45
-rw-r--r--src/soc/rockchip/rk3288/include/soc/grf.h6
4 files changed, 50 insertions, 3 deletions
diff --git a/src/soc/rockchip/rk3288/chip.h b/src/soc/rockchip/rk3288/chip.h
index b401ab4b42..9c65c4daaf 100644
--- a/src/soc/rockchip/rk3288/chip.h
+++ b/src/soc/rockchip/rk3288/chip.h
@@ -26,7 +26,6 @@ struct soc_rockchip_rk3288_config {
u32 vop_id;
gpio_t lcd_bl_pwm_gpio;
gpio_t lcd_bl_en_gpio;
- u32 lcd_power_on_udelay;
u32 bl_power_on_udelay;
u32 bl_pwm_to_enable_udelay;
u32 framebuffer_bits_per_pixel;
diff --git a/src/soc/rockchip/rk3288/display.c b/src/soc/rockchip/rk3288/display.c
index 68b4b8f4cd..06f0e64cfc 100644
--- a/src/soc/rockchip/rk3288/display.c
+++ b/src/soc/rockchip/rk3288/display.c
@@ -56,7 +56,6 @@ void rk_display_init(device_t dev, u32 lcdbase,
rkclk_configure_vop_aclk(conf->vop_id, 192 * MHz);
rk_edp_init(conf->vop_id);
- udelay(conf->lcd_power_on_udelay);
if (rk_edp_get_edid(&edid)) {
printk(BIOS_WARNING, "can not get edid\n");
diff --git a/src/soc/rockchip/rk3288/edp.c b/src/soc/rockchip/rk3288/edp.c
index 7b69ce8d2d..3f27195199 100644
--- a/src/soc/rockchip/rk3288/edp.c
+++ b/src/soc/rockchip/rk3288/edp.c
@@ -938,6 +938,49 @@ static int rk_edp_config_video(struct rk_edp *edp)
return rk_edp_is_video_stream_on(edp);
}
+static void rockchip_edp_force_hpd(struct rk_edp *edp)
+{
+ u32 val;
+
+ val = readl(&edp->regs->sys_ctl_3);
+ val |= (F_HPD | HPD_CTRL);
+ writel(val, &edp->regs->sys_ctl_3);
+}
+
+static int rockchip_edp_get_plug_in_status(struct rk_edp *edp)
+{
+ u32 val;
+
+ val = readl(&edp->regs->sys_ctl_3);
+ if (val & HPD_STATUS)
+ return 1;
+
+ return 0;
+}
+
+/*
+ * support edp HPD function
+ * some hardware version do not support edp hdp,
+ * we use 200ms to try to get the hpd single now,
+ * if we can not get edp hpd single, it will delay 200ms,
+ * also meet the edp power timing request, to compatible
+ * all of the hardware version
+ */
+static void rockchip_edp_wait_hpd(struct rk_edp *edp)
+{
+ struct stopwatch hpd;
+
+ stopwatch_init_msecs_expire(&hpd, 200);
+ do {
+ if (rockchip_edp_get_plug_in_status(edp))
+ return;
+ udelay(100);
+ } while (!stopwatch_expired(&hpd));
+
+ printk(BIOS_DEBUG, "do not get hpd single, force hpd\n");
+ rockchip_edp_force_hpd(edp);
+}
+
int rk_edp_get_edid(struct edid *edid)
{
int i;
@@ -983,6 +1026,8 @@ void rk_edp_init(u32 vop_id)
val = (vop_id == 1) ? RK_SETBITS(1 << 5) : RK_CLRBITS(1 << 5);
writel(val, &rk3288_grf->soc_con6);
+ rockchip_edp_wait_hpd(&rk_edp);
+
rk_edp_init_refclk(&rk_edp);
rk_edp_init_interrupt(&rk_edp);
rk_edp_enable_sw_function(&rk_edp);
diff --git a/src/soc/rockchip/rk3288/include/soc/grf.h b/src/soc/rockchip/rk3288/include/soc/grf.h
index 832563830b..9126aed834 100644
--- a/src/soc/rockchip/rk3288/include/soc/grf.h
+++ b/src/soc/rockchip/rk3288/include/soc/grf.h
@@ -89,7 +89,10 @@ struct rk3288_grf_regs {
u32 iomux_pwm0;
u32 iomux_pwm1;
};
- u32 gpio7b_iomux;
+ union {
+ u32 gpio7b_iomux;
+ u32 iomux_edp_hotplug;
+ };
union {
u32 gpio7cl_iomux;
u32 iomux_i2c5sda;
@@ -217,4 +220,5 @@ static struct rk3288_sgrf_regs * const rk3288_sgrf = (void *)GRF_SECURE_BASE;
#define IOMUX_EMMCPWREN RK_CLRSETBITS(0x3 << 2, 0x2 << 2)
#define IOMUX_EMMCCMD RK_CLRSETBITS(0x3f, 2 << 4 | 2 << 2 | 2 << 0)
#define IOMUX_PWM1 RK_SETBITS(1 << 2)
+#define IOMUX_EDP_HOTPLUG RK_CLRSETBITS(0x3 << 6, 0x2 << 6)
#endif