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-rw-r--r--src/soc/amd/picasso/aoac.c33
-rw-r--r--src/soc/amd/picasso/include/soc/southbridge.h1
2 files changed, 12 insertions, 22 deletions
diff --git a/src/soc/amd/picasso/aoac.c b/src/soc/amd/picasso/aoac.c
index 2e00d98900..2bf99845c9 100644
--- a/src/soc/amd/picasso/aoac.c
+++ b/src/soc/amd/picasso/aoac.c
@@ -63,37 +63,26 @@ bool is_aoac_device_enabled(int dev)
return false;
}
-static void enable_aoac_console_uart(void)
+void wait_for_aoac_enabled(int dev)
{
- if (!CONFIG(PICASSO_UART))
- return;
-
- power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
-}
-
-static bool is_aoac_console_uart_enabled(void)
-{
- if (!CONFIG(PICASSO_UART))
- return true;
-
- return is_aoac_device_enabled(FCH_AOAC_UART_FOR_CONSOLE);
+ while (!is_aoac_device_enabled(dev))
+ udelay(100);
}
void enable_aoac_devices(void)
{
- bool status;
int i;
for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
power_on_aoac_device(aoac_devs[i]);
- enable_aoac_console_uart();
+
+ if (CONFIG(PICASSO_UART))
+ power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
/* Wait for AOAC devices to indicate power and clock OK */
- do {
- udelay(100);
- status = true;
- for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
- status &= is_aoac_device_enabled(aoac_devs[i]);
- status &= is_aoac_console_uart_enabled();
- } while (!status);
+ for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
+ wait_for_aoac_enabled(aoac_devs[i]);
+
+ if (CONFIG(PICASSO_UART))
+ wait_for_aoac_enabled(FCH_AOAC_UART_FOR_CONSOLE);
}
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index 7265d30a77..97b0ab4d35 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -280,6 +280,7 @@ void enable_aoac_devices(void);
bool is_aoac_device_enabled(int dev);
void power_on_aoac_device(int dev);
void power_off_aoac_device(int dev);
+void wait_for_aoac_enabled(int dev);
void sb_clk_output_48Mhz(void);
void sb_enable(struct device *dev);
void southbridge_final(void *chip_info);