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-rw-r--r--src/soc/intel/apollolake/chip.c2
-rw-r--r--src/soc/intel/common/block/xhci/elog.c4
-rw-r--r--src/soc/mediatek/common/usb.c2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index b9c5a4fa27..03e6dbd038 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -842,7 +842,7 @@ void platform_fsp_notify_status(enum fsp_notify_phase phase)
/*
* Override GLK xhci clock gating register(XHCLKGTEN) to
- * mitigate usb device suspend and resume failure.
+ * mitigate USB device suspend and resume failure.
*/
if (CONFIG(SOC_INTEL_GLK)) {
uint32_t *cfg;
diff --git a/src/soc/intel/common/block/xhci/elog.c b/src/soc/intel/common/block/xhci/elog.c
index 0fd41bfdf0..d8ee29c9ff 100644
--- a/src/soc/intel/common/block/xhci/elog.c
+++ b/src/soc/intel/common/block/xhci/elog.c
@@ -84,7 +84,7 @@ static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t event)
/*
* Check if CSC bit is set and port is capable of wake on
* connect/disconnect to identify if the port caused wake
- * event for usb attach/detach.
+ * event for USB attach/detach.
*/
if (pch_xhci_csc_set(port_status) &&
pch_xhci_wake_capable(port_status)) {
@@ -95,7 +95,7 @@ static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t event)
/*
* Check if PLC is set and PLS indicates resume to identify if
- * the port caused wake event for usb activity.
+ * the port caused wake event for USB activity.
*/
if (pch_xhci_plc_set(port_status) &&
pch_xhci_resume(port_status)) {
diff --git a/src/soc/mediatek/common/usb.c b/src/soc/mediatek/common/usb.c
index d80cfe98b3..b148093af0 100644
--- a/src/soc/mediatek/common/usb.c
+++ b/src/soc/mediatek/common/usb.c
@@ -104,7 +104,7 @@ static int check_ip_clk_status(void)
do {
if (stopwatch_expired(&sw)) {
- u3p_err("usb clocks are not stable!!!\n");
+ u3p_err("USB clocks are not stable!!!\n");
return -1;
}