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-rw-r--r--src/soc/intel/apollolake/chip.c6
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c2
-rw-r--r--src/soc/intel/skylake/thermal.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 3c4bf968e9..361e6a417e 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -294,7 +294,7 @@ static void pcie_override_devicetree_after_silicon_init(void)
/* Configure package power limits */
static void set_power_limits(void)
{
- static struct soc_intel_apollolake_config *cfg;
+ struct soc_intel_apollolake_config *cfg;
msr_t rapl_msr_reg, limit;
uint32_t power_unit;
uint32_t tdp, min_power, max_power;
@@ -361,7 +361,7 @@ static void set_power_limits(void)
/* Overwrites the SCI IRQ if another IRQ number is given by device tree. */
static void set_sci_irq(void)
{
- static struct soc_intel_apollolake_config *cfg;
+ struct soc_intel_apollolake_config *cfg;
uint32_t scis;
cfg = config_of_path(SA_DEVFN_ROOT);
@@ -666,7 +666,7 @@ void __weak mainboard_devtree_update(struct device *dev)
void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
{
FSP_S_CONFIG *silconfig = &silupd->FspsConfig;
- static struct soc_intel_apollolake_config *cfg;
+ struct soc_intel_apollolake_config *cfg;
struct device *dev;
/* Load VBT before devicetree-specific config. */
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 5b61df3c68..064f71e2f2 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -232,7 +232,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
{
FSP_S_CONFIG *params = &supd->FspsConfig;
FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig;
- static struct soc_intel_skylake_config *config;
+ struct soc_intel_skylake_config *config;
struct device *dev;
uintptr_t vbt_data = (uintptr_t)vbt_get();
int i;
diff --git a/src/soc/intel/skylake/thermal.c b/src/soc/intel/skylake/thermal.c
index 97cd1b7779..936543c7bf 100644
--- a/src/soc/intel/skylake/thermal.c
+++ b/src/soc/intel/skylake/thermal.c
@@ -62,7 +62,7 @@ static void pch_thermal_set_bar(struct device *dev, uintptr_t tempbar)
/* PCH Low Temp Threshold (LTT) */
static uint16_t pch_get_ltt_value(struct device *dev)
{
- static struct soc_intel_skylake_config *config;
+ struct soc_intel_skylake_config *config;
uint16_t ltt_value;
uint16_t trip_temp = DEFAULT_TRIP_TEMP;