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-rw-r--r--src/soc/nvidia/tegra124/sor.c1
-rw-r--r--src/soc/rockchip/rk3288/sdram.c6
2 files changed, 3 insertions, 4 deletions
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index 3bc50e813e..52b909e29d 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -237,6 +237,7 @@ static int tegra_dc_sor_power_dplanes(struct tegra_dc_sor_data *sor,
/* fall through */
case 2:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
+ /* fall through */
case 1:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;
diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c
index 53c594a4b3..74038b078e 100644
--- a/src/soc/rockchip/rk3288/sdram.c
+++ b/src/soc/rockchip/rk3288/sdram.c
@@ -751,10 +751,8 @@ static void move_to_config_state(struct rk3288_ddr_publ_regs *ddr_publ_regs,
while ((read32(&ddr_publ_regs->pgsr) & PGSR_DLDONE)
!= PGSR_DLDONE)
;
- /* if at low power state,need wakeup first,
- * and then enter the config
- * so here no break.
- */
+ /* if at low power state, need wakeup first, then enter the config */
+ /* fall through */
case ACCESS:
case INIT_MEM:
write32(&ddr_pctl_regs->sctl, CFG_STATE);