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-rw-r--r--src/soc/intel/icelake/romstage/fsp_params.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/intel/icelake/romstage/fsp_params.c b/src/soc/intel/icelake/romstage/fsp_params.c
index 99f606b4e2..5aea2ee8af 100644
--- a/src/soc/intel/icelake/romstage/fsp_params.c
+++ b/src/soc/intel/icelake/romstage/fsp_params.c
@@ -30,10 +30,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
uint32_t mask = 0;
if (!dev || !dev->enabled) {
- /*
- * Skip IGD initialization in FSP if device
- * is disabled in devicetree.cb.
- */
+ /* Skip IGD initialization in FSP if device is disabled in devicetree.cb. */
m_cfg->InternalGfx = 0;
m_cfg->IgdDvmt50PreAlloc = 0;
} else {