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Diffstat (limited to 'src/southbridge/amd/agesa/hudson/bootblock.c')
-rw-r--r--src/southbridge/amd/agesa/hudson/bootblock.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c
index e103bc4325..e8307b1c07 100644
--- a/src/southbridge/amd/agesa/hudson/bootblock.c
+++ b/src/southbridge/amd/agesa/hudson/bootblock.c
@@ -19,9 +19,7 @@
static void hudson_enable_rom(void)
{
u8 reg8;
- pci_devfn_t dev;
-
- dev = PCI_DEV(0, 0x14, 3);
+ const pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
/* Decode variable LPC ROM address ranges 1 and 2. */
reg8 = pci_s_read_config8(dev, 0x48);
@@ -49,7 +47,6 @@ static void hudson_enable_rom(void)
void bootblock_early_southbridge_init(void)
{
- pci_devfn_t dev;
u32 data;
hudson_enable_rom();
@@ -61,7 +58,7 @@ void bootblock_early_southbridge_init(void)
else if (CONFIG(POST_DEVICE_LPC))
hudson_lpc_port80();
- dev = PCI_DEV(0, 0x14, 3);
+ const pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
data = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE);
/* enable 0x2e/0x4e IO decoding for SuperIO */
pci_write_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE, data | 3);