3 files changed, 5 insertions, 22 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index 93db1a920c..e56a493a63 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -31,10 +31,6 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
 	select SOC_AMD_COMMON_BLOCK
 	select SOC_AMD_COMMON_BLOCK_ACPIMMIO
 
-config BOOTBLOCK_SOUTHBRIDGE_INIT
-	string
-	default "southbridge/amd/agesa/hudson/bootblock.c"
-
 config EHCI_BAR
 	hex
 	default 0xfef00000
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc
index be4ea26bee..b8eb5b9b37 100644
--- a/src/southbridge/amd/agesa/hudson/Makefile.inc
+++ b/src/southbridge/amd/agesa/hudson/Makefile.inc
@@ -16,11 +16,9 @@ ramstage-y += sd.c
 
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 
-ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y)
 bootblock-y += bootblock.c
 bootblock-y += early_setup.c
 bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
-endif
 
 romstage-y += enable_usbdebug.c
 ramstage-y += enable_usbdebug.c
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c
index 4da030b89a..517b928d8d 100644
--- a/src/southbridge/amd/agesa/hudson/bootblock.c
+++ b/src/southbridge/amd/agesa/hudson/bootblock.c
@@ -14,7 +14,10 @@
  */
 
 #include <stdint.h>
+#include <arch/bootblock.h>
+#include <amdblocks/acpimmio.h>
 #include <device/pci_ops.h>
+#include <southbridge/amd/agesa/hudson/hudson.h>
 
 /*
  * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF.
@@ -56,24 +59,12 @@ static void hudson_enable_rom(void)
 	pci_io_write_config16(dev, 0x6e, 0xffff);
 }
 
-static void bootblock_southbridge_init(void)
-{
-	hudson_enable_rom();
-}
-
-
-#if !CONFIG(ROMCC_BOOTBLOCK)
-
-#include <bootblock_common.h>
-#include <amdblocks/acpimmio.h>
-#include <southbridge/amd/agesa/hudson/hudson.h>
-
-void bootblock_soc_early_init(void)
+void bootblock_early_southbridge_init(void)
 {
 	pci_devfn_t dev;
 	u32 data;
 
-	bootblock_southbridge_init();
+	hudson_enable_rom();
 	enable_acpimmio_decode_pm24();
 	hudson_lpc_decode();
 
@@ -94,7 +85,6 @@ void bootblock_soc_early_init(void)
 	 * Enable decoding of legacy TPM addresses: IO addresses 0x7f-
 	 * 0x7e and 0xef-0xee.
 	 */
-
 	data = pci_read_config32(dev, LPC_TRUSTED_PLATFORM_MODULE);
 	data |= TPM_12_EN | TPM_LEGACY_EN;
 	pci_write_config32(dev, LPC_TRUSTED_PLATFORM_MODULE, data);
@@ -109,4 +99,3 @@ void bootblock_soc_early_init(void)
 	 */
 	pm_write8(0xd2, 0);
 }
-#endif