diff options
Diffstat (limited to 'src/southbridge/amd/amd8111')
| -rw-r--r-- | src/southbridge/amd/amd8111/lpc.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/amd8111/nic.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c index 718b40bf9d..d75723ce65 100644 --- a/src/southbridge/amd/amd8111/lpc.c +++ b/src/southbridge/amd/amd8111/lpc.c @@ -42,7 +42,7 @@ static void lpc_init(struct device *dev) byte |= 1; pci_write_config8(dev, 0x4B, byte); /* Don't rename IO APIC */ - setup_ioapic(IO_APIC_ADDR, 0); + setup_ioapic(VIO_APIC_VADDR, 0); /* posted memory write enable */ byte = pci_read_config8(dev, 0x46); diff --git a/src/southbridge/amd/amd8111/nic.c b/src/southbridge/amd/amd8111/nic.c index 5352705c6c..21df6c05d6 100644 --- a/src/southbridge/amd/amd8111/nic.c +++ b/src/southbridge/amd/amd8111/nic.c @@ -11,7 +11,7 @@ #include "amd8111.h" -#define CMD3 0x54 +#define CMD3 (0x54/(sizeof(u32))) typedef enum { VAL3 = (1 << 31), /* VAL bit for byte 3 */ @@ -45,11 +45,11 @@ static void nic_init(struct device *dev) { struct southbridge_amd_amd8111_config *conf; struct resource *resource; - unsigned long mmio; + u8 *mmio; conf = dev->chip_info; resource = find_resource(dev, PCI_BASE_ADDRESS_0); - mmio = resource->base; + mmio = res2mmio(resource, 0, 0); /* Hard Reset PHY */ printk(BIOS_DEBUG, "Resetting PHY... "); |