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-rw-r--r--src/southbridge/amd/cs5530/cs5530.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/southbridge/amd/cs5530/cs5530.h b/src/southbridge/amd/cs5530/cs5530.h
index df4f66bae0..107b6f26e5 100644
--- a/src/southbridge/amd/cs5530/cs5530.h
+++ b/src/southbridge/amd/cs5530/cs5530.h
@@ -27,6 +27,12 @@ void cs5530_enable(device_t dev);
#endif
#define DECODE_CONTROL_REG2 0x5b /* F0 index 0x5b */
+#define ROM_AT_LOGIC_CONTROL_REG 0x52 /* F0 index 0x52 */
+
+#define LOWER_ROM_ADDRESS_RANGE (1 << 0)
+#define ROM_WRITE_ENABLE (1 << 1)
+#define UPPER_ROM_ADDRESS_RANGE (1 << 2)
+#define BIOS_ROM_POSITIVE_DECODE (1 << 5)
/* Selects PCI positive decoding for accesses to the configured ROM space. */
#define BIOS_ROM_POSITIVE_DECODE (1 << 5)