diff options
Diffstat (limited to 'src/southbridge/amd/cs5536/cs5536.c')
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536.c | 30 |
1 files changed, 21 insertions, 9 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index 90ffe323ec..37c54d5c50 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -5,7 +5,9 @@ #include <device/pci_ops.h> #include <device/pci_ids.h> #include <console/console.h> -#include "cs5536.h" +#include <cpu/amd/gx2def.h> +#include <cpu/x86/msr.h> +#include "chip.h" static void southbridge_init(struct device *dev) { @@ -17,23 +19,25 @@ static void southbridge_enable(struct device *dev) { struct southbridge_amd_cs5536_config *sb = (struct southbridge_amd_cs5536_config *)dev->chip_info; msr_t msr; - struct device *gpiodev; - unsigned short gpiobase = MDD_GPIO; + /* + * struct device *gpiodev; + * unsigned short gpiobase = MDD_GPIO; + */ printk_err("%s: dev is %p\n", __FUNCTION__, dev); - if (chip_info->lpc_serirq_enable) { - msr.lo = chip_info->lpc_serirq_enable; + if (sb->lpc_serirq_enable) { + msr.lo = sb->lpc_serirq_enable; msr.hi = 0; wrmsr(MDD_LPC_SIRQ, msr); } - if (chip_info->lpc_irq) { - msr.lo = chip_info->lpc_irq; + if (sb->lpc_irq) { + msr.lo = sb->lpc_irq; msr.hi = 0; wrmsr(MDD_IRQM_LPC, msr); } - if (chip_info->enable_gpio0_inta){ - rdmsr(MDD_IRQM_ZHIGH, msr); + if (sb->enable_gpio0_inta){ + msr = rdmsr(MDD_IRQM_ZHIGH); msr.lo |= 0x10; wrmsr(MDD_IRQM_ZHIGH, msr); /* todo: look the device up. But we know that gpiobase is 0x6100 */ @@ -69,3 +73,11 @@ static struct pci_driver cs5536_pci_driver __pci_driver = { .vendor = PCI_VENDOR_ID_AMD, .device = PCI_DEVICE_ID_AMD_CS5536_ISA }; + +struct chip_operations southbridge_amd_cs5536_ops = { + CHIP_NAME("AMD cs5536") + /* This only called when this device is listed in the + * static device tree. + */ + .enable_dev = southbridge_enable, +}; |