summaryrefslogtreecommitdiff
path: root/src/southbridge/amd/cs5536
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/amd/cs5536')
-rw-r--r--src/southbridge/amd/cs5536/cs5536.c4
-rw-r--r--src/southbridge/amd/cs5536/cs5536_early_setup.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c
index f068006f75..2a3662c517 100644
--- a/src/southbridge/amd/cs5536/cs5536.c
+++ b/src/southbridge/amd/cs5536/cs5536.c
@@ -77,7 +77,7 @@ struct acpiinit acpi_init_table[] = {
{PMS_IO_BASE + PM_SIDD, 0x000008C02},
{PMS_IO_BASE + PM_WKD, 0x0000000A0},
{PMS_IO_BASE + PM_WKXD, 0x0000000A0},
- {0, 0, 0}
+ {0, 0}
};
struct FLASH_DEVICE {
@@ -197,7 +197,7 @@ static void ChipsetFlashSetup(void)
/* Run after VSA init to enable the flash PCI device header */
/* **/
/* ***************************************************************************/
-static void enable_ide_nand_flash_header()
+static void enable_ide_nand_flash_header(void)
{
/* Tell VSA to use FLASH PCI header. Not IDE header. */
outl(0x80007A40, 0xCF8);
diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c
index cd8bffa868..cedc209c56 100644
--- a/src/southbridge/amd/cs5536/cs5536_early_setup.c
+++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c
@@ -156,7 +156,7 @@ static void cs5536_setup_cis_mode(void)
*
* See page 412 of the AMD Geode CS5536 Companion Device data book.
*/
-void cs5536_setup_onchipuart1(void)
+static void cs5536_setup_onchipuart1(void)
{
msr_t msr;
@@ -196,7 +196,7 @@ void cs5536_setup_onchipuart1(void)
wrmsr(MDD_UART1_CONF, msr);
}
-void cs5536_setup_onchipuart2(void)
+static void cs5536_setup_onchipuart2(void)
{
msr_t msr;