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-rw-r--r--src/southbridge/amd/rs690/cmn.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/rs690/cmn.c b/src/southbridge/amd/rs690/cmn.c
index 86a6976606..eba1c75b50 100644
--- a/src/southbridge/amd/rs690/cmn.c
+++ b/src/southbridge/amd/rs690/cmn.c
@@ -273,7 +273,7 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port)
res = 0;
count = 0;
break;
- case 0x07: /* device is in compliance state (training sequence is doen). Move to train the next device */
+ case 0x07: /* device is in compliance state (training sequence is done). Move to train the next device */
res = 1; /* TODO: CIM sets it to 0 */
count = 0;
break;