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Diffstat (limited to 'src/southbridge/amd/rs780/cmn.c')
-rw-r--r--src/southbridge/amd/rs780/cmn.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c
index c39c6e9968..b849e1efa7 100644
--- a/src/southbridge/amd/rs780/cmn.c
+++ b/src/southbridge/amd/rs780/cmn.c
@@ -256,9 +256,6 @@ u8 PcieTrainPort(struct device *nb_dev, struct device *dev, u32 port)
u32 lc_state, reg, current_link_width, lane_mask;
int8_t current, res = 0;
u32 gfx_gpp_sb_sel;
- void set_pcie_dereset(void);
- void set_pcie_reset(void);
-
switch (port) {
case 2 ... 3:
gfx_gpp_sb_sel = PCIE_CORE_INDEX_GFX;
@@ -397,3 +394,11 @@ int is_family10h(void)
{
return cpuidFamily() == 0x10;
}
+
+__weak void set_pcie_reset(void)
+{
+}
+
+__weak void set_pcie_dereset(void)
+{
+}