diff options
Diffstat (limited to 'src/southbridge/amd/sb700/sb700_sm.c')
| -rw-r--r-- | src/southbridge/amd/sb700/sb700_sm.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/sb700/sb700_sm.c b/src/southbridge/amd/sb700/sb700_sm.c index dbd7a6ab02..d053aff0fd 100644 --- a/src/southbridge/amd/sb700/sb700_sm.c +++ b/src/southbridge/amd/sb700/sb700_sm.c @@ -54,7 +54,7 @@ static void sm_init(device_t dev) u32 on; u32 nmi_option; - printk_info("sm_init().\n"); + printk(BIOS_INFO, "sm_init().\n"); ioapic_base = pci_read_config32(dev, 0x74) & (0xffffffe0); /* some like mem resource, but does not have enable bit */ /* Don't rename APIC ID */ @@ -118,7 +118,7 @@ static void sm_init(device_t dev) } byte |= 1 << 2; pm_iowrite(0x74, byte); - printk_info("set power %s after power fail\n", on ? "on" : "off"); + printk(BIOS_INFO, "set power %s after power fail\n", on ? "on" : "off"); byte = pm_ioread(0x68); byte &= ~(1 << 1); @@ -152,10 +152,10 @@ static void sm_init(device_t dev) get_option(&nmi_option, "nmi"); if (nmi_option) { byte &= ~(1 << 7); /* set NMI */ - printk_info("++++++++++set NMI+++++\n"); + printk(BIOS_INFO, "++++++++++set NMI+++++\n"); } else { byte |= (1 << 7); /* Can not mask NMI from PCI-E and NMI_NOW */ - printk_info("++++++++++no set NMI+++++\n"); + printk(BIOS_INFO, "++++++++++no set NMI+++++\n"); } byte &= ~(1 << 7); if (byte != byte_old) { @@ -217,7 +217,7 @@ static void sm_init(device_t dev) byte &= ~(1 << 1); pm_iowrite(0x59, byte); - printk_info("sm_init() end\n"); + printk(BIOS_INFO, "sm_init() end\n"); /* Enable NbSb virtual channel */ axcfg_reg(0x114, 0x3f << 1, 0 << 1); |