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Diffstat (limited to 'src/southbridge/amd/sb700')
-rw-r--r--src/southbridge/amd/sb700/early_setup.c2
-rw-r--r--src/southbridge/amd/sb700/ramtop.c2
-rw-r--r--src/southbridge/amd/sb700/sata.c6
3 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index 6e072a6f82..a6569210f4 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -816,7 +816,7 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos)
for (i = 0; i < size; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
- outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
+ outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);
nvram_pos++;
}
diff --git a/src/southbridge/amd/sb700/ramtop.c b/src/southbridge/amd/sb700/ramtop.c
index d306fff6fd..4d261210fe 100644
--- a/src/southbridge/amd/sb700/ramtop.c
+++ b/src/southbridge/amd/sb700/ramtop.c
@@ -32,7 +32,7 @@ void backup_top_of_low_cacheable(uintptr_t ramtop)
int nvram_pos = 0xfc, i;
for (i = 0; i < 4; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
- outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
+ outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);
nvram_pos++;
}
}
diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c
index 1d1ac13890..975e5ac132 100644
--- a/src/southbridge/amd/sb700/sata.c
+++ b/src/southbridge/amd/sb700/sata.c
@@ -461,7 +461,7 @@ static void sata_init(struct device *dev)
else
printk(BIOS_DEBUG, "%s %s device is %sready after %i tries\n",
(i / 2) ? "Secondary" : "Primary",
- (i % 2 ) ? "Slave" : "Master",
+ (i % 2) ? "Slave" : "Master",
(j == 10) ? "not " : "",
(j == 10) ? j : j + 1);
} else {
@@ -470,7 +470,7 @@ static void sata_init(struct device *dev)
else
printk(BIOS_DEBUG, "No %s %s SATA drive on Slot%i\n",
(i / 2) ? "Secondary" : "Primary",
- (i % 2 ) ? "Slave" : "Master", i);
+ (i % 2) ? "Slave" : "Master", i);
}
}
@@ -510,7 +510,7 @@ static void sata_init(struct device *dev)
write32((sata_bar5 + 0x3b0), 0xFFFFFFFF);
/* Clear SATA status,Firstly we get the AcpiGpe0BlkAddr */
- /* ????? why CIM does not set the AcpiGpe0BlkAddr , but use it??? */
+ /* ????? why CIM does not set the AcpiGpe0BlkAddr, but use it??? */
/* word = 0x0000; */
/* word = pm_ioread(0x28); */