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-rw-r--r--src/southbridge/amd/amd8111/early_smbus.c2
-rw-r--r--src/southbridge/amd/cs5535/early_setup.c12
-rw-r--r--src/southbridge/amd/cs5536/early_setup.c12
-rw-r--r--src/southbridge/amd/cs5536/smbus.c6
4 files changed, 14 insertions, 18 deletions
diff --git a/src/southbridge/amd/amd8111/early_smbus.c b/src/southbridge/amd/amd8111/early_smbus.c
index e23628630a..aed4ebb46d 100644
--- a/src/southbridge/amd/amd8111/early_smbus.c
+++ b/src/southbridge/amd/amd8111/early_smbus.c
@@ -23,7 +23,7 @@ static void enable_smbus(void)
/* clear any lingering errors, so the transaction will run */
outw(inw(SMBUS_IO_BASE + SMBGSTATUS), SMBUS_IO_BASE + SMBGSTATUS);
- print_spew("SMBus controller enabled\n");
+ printk(BIOS_SPEW, "SMBus controller enabled\n");
}
static inline int smbus_recv_byte(unsigned device)
diff --git a/src/southbridge/amd/cs5535/early_setup.c b/src/southbridge/amd/cs5535/early_setup.c
index 4a2e1b4965..1030aa0e88 100644
--- a/src/southbridge/amd/cs5535/early_setup.c
+++ b/src/southbridge/amd/cs5535/early_setup.c
@@ -127,19 +127,19 @@ static void cs5535_early_setup(void)
msr = rdmsr(GLCP_SYS_RSTPLL);
if (msr.lo & (0x3f << 26)) {
/* PLL is already set and we are reboot from PLL reset */
- print_debug("reboot from BIOS reset\n");
+ printk(BIOS_DEBUG, "reboot from BIOS reset\n");
return;
}
- print_debug("Setup idsel\n");
+ printk(BIOS_DEBUG, "Setup idsel\n");
cs5535_setup_idsel();
- print_debug("Setup iobase\n");
+ printk(BIOS_DEBUG, "Setup iobase\n");
cs5535_usb_swapsif();
cs5535_setup_iobase();
- print_debug("Setup gpio\n");
+ printk(BIOS_DEBUG, "Setup gpio\n");
cs5535_setup_gpio();
- print_debug("Setup cis_mode\n");
+ printk(BIOS_DEBUG, "Setup cis_mode\n");
cs5535_setup_cis_mode();
- print_debug("Setup smbus\n");
+ printk(BIOS_DEBUG, "Setup smbus\n");
cs5535_enable_smbus();
dummy();
}
diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c
index e6ef8ad4e8..ea8b5e030f 100644
--- a/src/southbridge/amd/cs5536/early_setup.c
+++ b/src/southbridge/amd/cs5536/early_setup.c
@@ -258,18 +258,18 @@ static void cs5536_early_setup(void)
msr = rdmsr(GLCP_SYS_RSTPLL);
if (msr.lo & (0x3f << 26)) {
/* PLL is already set and we are reboot from PLL reset */
- //print_debug("reboot from BIOS reset\n");
+ //printk(BIOS_DEBUG, "reboot from BIOS reset\n");
return;
}
- //print_debug("Setup idsel\n");
+ //printk(BIOS_DEBUG, "Setup idsel\n");
cs5536_setup_idsel();
- //print_debug("Setup iobase\n");
+ //printk(BIOS_DEBUG, "Setup iobase\n");
cs5536_usb_swapsif();
cs5536_setup_iobase();
- //print_debug("Setup gpio\n");
+ //printk(BIOS_DEBUG, "Setup gpio\n");
cs5536_setup_gpio();
- //print_debug("Setup smbus\n");
+ //printk(BIOS_DEBUG, "Setup smbus\n");
cs5536_enable_smbus();
- //print_debug("Setup power button\n");
+ //printk(BIOS_DEBUG, "Setup power button\n");
cs5536_setup_power_button();
}
diff --git a/src/southbridge/amd/cs5536/smbus.c b/src/southbridge/amd/cs5536/smbus.c
index 31c5bf124b..3da8389697 100644
--- a/src/southbridge/amd/cs5536/smbus.c
+++ b/src/southbridge/amd/cs5536/smbus.c
@@ -182,11 +182,7 @@ unsigned char do_smbus_read_byte(unsigned smbus_io_base,
return smbus_get_result(smbus_io_base);
err:
- print_debug("SMBUS READ ERROR:");
- print_debug_hex8(error);
- print_debug(" device:");
- print_debug_hex8(device);
- print_debug("\n");
+ printk(BIOS_DEBUG, "SMBUS READ ERROR: %02x device: %02x\n", error, device);
/* stop, clean up the error, and leave */
smbus_stop_condition(smbus_io_base);
outb(inb(smbus_io_base + SMB_STS), smbus_io_base + SMB_STS);