3 files changed, 16 insertions, 16 deletions
diff --git a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
index 459df6ffad..cce39255d3 100644
--- a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
+++ b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
@@ -26,15 +26,16 @@
 #include <device/pci_def.h>
 #include "hudson.h"
 
-#ifndef HUDSON_DEVN_BASE
-#define HUDSON_DEVN_BASE 0
-#endif
-
 #define DEBUGPORT_MISC_CONTROL		0x80
 
 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
 {
-	return PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2);
+	if (hcd_idx==3)
+		return PCI_DEV(0, 0x16, 2);
+	else if (hcd_idx==2)
+		return PCI_DEV(0, 0x13, 2);
+	else
+		return PCI_DEV(0, 0x12, 2);
 }
 
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
diff --git a/src/southbridge/amd/sb700/enable_usbdebug.c b/src/southbridge/amd/sb700/enable_usbdebug.c
index 3d44a1ac0c..57798c1b96 100644
--- a/src/southbridge/amd/sb700/enable_usbdebug.c
+++ b/src/southbridge/amd/sb700/enable_usbdebug.c
@@ -29,14 +29,12 @@
 
 #define DEBUGPORT_MISC_CONTROL		0x80
 
-/*
- * Note: The SB700 has two EHCI devices, D18:F2 and D19:F2.
- * This code currently only supports the first one, i.e., USB Debug devices
- * attached to physical USB ports belonging to the first EHCI device.
- */
 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
 {
-	return PCI_DEV(0, 0x12, 2);
+	if (hcd_idx==2)
+		return PCI_DEV(0, 0x13, 2);
+	else
+		return PCI_DEV(0, 0x12, 2);
 }
 
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index 92778698f2..34d760874f 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -26,15 +26,16 @@
 #include <device/pci_def.h>
 #include "sb800.h"
 
-#ifndef SB800_DEVN_BASE
-#define SB800_DEVN_BASE 0
-#endif
-
 #define DEBUGPORT_MISC_CONTROL		0x80
 
 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
 {
-	return PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2);
+	if (hcd_idx==3)
+		return PCI_DEV(0, 0x16, 2);
+	else if (hcd_idx==2)
+		return PCI_DEV(0, 0x13, 2);
+	else
+		return PCI_DEV(0, 0x12, 2);
 }
 
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)