diff options
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r-- | src/southbridge/amd/amd8111/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/early_ctrl.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/reset.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/sb700/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/amd/sb700/reset.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/sb800/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/amd/sb800/early_setup.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/sb800/reset.c | 2 |
8 files changed, 5 insertions, 8 deletions
diff --git a/src/southbridge/amd/amd8111/Kconfig b/src/southbridge/amd/amd8111/Kconfig index 5541c93418..1436d8cc83 100644 --- a/src/southbridge/amd/amd8111/Kconfig +++ b/src/southbridge/amd/amd8111/Kconfig @@ -16,7 +16,6 @@ config SOUTHBRIDGE_AMD_AMD8111 bool select IOAPIC - select HAVE_HARD_RESET config BOOTBLOCK_SOUTHBRIDGE_INIT string diff --git a/src/southbridge/amd/amd8111/early_ctrl.c b/src/southbridge/amd/amd8111/early_ctrl.c index f3ba8b6704..aa323e45a0 100644 --- a/src/southbridge/amd/amd8111/early_ctrl.c +++ b/src/southbridge/amd/amd8111/early_ctrl.c @@ -52,7 +52,7 @@ static void enable_cf9(void) enable_cf9_x(sbbusn, sbdn); } -void do_hard_reset(void) +void do_board_reset(void) { set_bios_reset(); /* reset */ diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c index fea8891a98..41d9880f59 100644 --- a/src/southbridge/amd/amd8111/reset.c +++ b/src/southbridge/amd/amd8111/reset.c @@ -37,7 +37,7 @@ static pci_devfn_t pci_io_locate_device_on_bus(unsigned pci_id, unsigned bus) #include "../../../northbridge/amd/amdk8/reset_test.c" -void do_hard_reset(void) +void do_board_reset(void) { pci_devfn_t dev; unsigned bus; diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig index 353c2a46c7..6d62e67d37 100644 --- a/src/southbridge/amd/sb700/Kconfig +++ b/src/southbridge/amd/sb700/Kconfig @@ -22,7 +22,6 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy def_bool y select IOAPIC select HAVE_USBDEBUG_OPTIONS - select HAVE_HARD_RESET select SMBUS_HAS_AUX_CHANNELS config SOUTHBRIDGE_AMD_SB700_33MHZ_SPI diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c index 08780399b1..f5f7a2c2f3 100644 --- a/src/southbridge/amd/sb700/reset.c +++ b/src/southbridge/amd/sb700/reset.c @@ -44,7 +44,7 @@ static void set_bios_reset(void) } } -void do_hard_reset(void) +void do_board_reset(void) { set_bios_reset(); diff --git a/src/southbridge/amd/sb800/Kconfig b/src/southbridge/amd/sb800/Kconfig index f20fa82669..d66469a490 100644 --- a/src/southbridge/amd/sb800/Kconfig +++ b/src/southbridge/amd/sb800/Kconfig @@ -17,7 +17,6 @@ config SOUTHBRIDGE_AMD_SB800 bool select IOAPIC select HAVE_USBDEBUG_OPTIONS - select HAVE_HARD_RESET if SOUTHBRIDGE_AMD_SB800 diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index badc4a7b05..d73b75d391 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -218,7 +218,7 @@ static void enable_fid_change_on_sb(u32 sbbusn, u32 sbdn) pmio_write(0x81, byte); } -void do_hard_reset(void) +void do_board_reset(void) { set_bios_reset(); diff --git a/src/southbridge/amd/sb800/reset.c b/src/southbridge/amd/sb800/reset.c index e3f36f3309..bd578b6c0d 100644 --- a/src/southbridge/amd/sb800/reset.c +++ b/src/southbridge/amd/sb800/reset.c @@ -21,7 +21,7 @@ #include <northbridge/amd/amdk8/reset_test.c> -void do_hard_reset(void) +void do_board_reset(void) { set_bios_reset(); /* Try rebooting through port 0xcf9 */ |