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-rw-r--r--src/southbridge/amd/cimx/sb800/late.c6
-rw-r--r--src/southbridge/amd/cimx/sb900/late.c4
2 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 60d40f7049..e3390d5c60 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -353,9 +353,9 @@ static void sb800_enable(struct device *dev)
case PCI_DEVFN(0x11, 0): /* 0:11.0 SATA */
if (dev->enabled) {
sb_config->SATAMODE.SataMode.SataController = CIMX_OPTION_ENABLED;
- if (1 == sb_chip->boot_switch_sata_ide)
+ if (sb_chip->boot_switch_sata_ide == 1)
sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 0; //0 -IDE as primary.
- else if (0 == sb_chip->boot_switch_sata_ide)
+ else if (sb_chip->boot_switch_sata_ide == 0)
sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 1; //1 -IDE as secondary.
} else {
sb_config->SATAMODE.SataMode.SataController = CIMX_OPTION_DISABLED;
@@ -387,7 +387,7 @@ static void sb800_enable(struct device *dev)
case PCI_DEVFN(0x14, 2): /* 0:14:2 HDA */
if (dev->enabled) {
- if (AZALIA_DISABLE == sb_config->AzaliaController) {
+ if (sb_config->AzaliaController == AZALIA_DISABLE) {
sb_config->AzaliaController = AZALIA_AUTO;
}
} else {
diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c
index 9a2f837010..25e087f641 100644
--- a/src/southbridge/amd/cimx/sb900/late.c
+++ b/src/southbridge/amd/cimx/sb900/late.c
@@ -354,9 +354,9 @@ static void sb900_enable(struct device *dev)
case (0x11 << 3) | 0: /* 0:11.0 SATA */
if (dev->enabled) {
sb_config->SATAMODE.SataMode.SataController = ENABLED;
- if (1 == sb_chip->boot_switch_sata_ide)
+ if (sb_chip->boot_switch_sata_ide == 1)
sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 0; //0 -IDE as primary.
- else if (0 == sb_chip->boot_switch_sata_ide)
+ else if (sb_chip->boot_switch_sata_ide == 0)
sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 1; //1 -IDE as secondary.
} else {
sb_config->SATAMODE.SataMode.SataController = DISABLED;