6 files changed, 22 insertions, 22 deletions

diff --git a/src/southbridge/amd/amd8111/amd8111_early_smbus.c b/src/southbridge/amd/amd8111/amd8111_early_smbus.c
index c8996784de..11aa6f750e 100644
--- a/src/southbridge/amd/amd8111/amd8111_early_smbus.c
+++ b/src/southbridge/amd/amd8111/amd8111_early_smbus.c
@@ -9,7 +9,7 @@ static void enable_smbus(void)
 
 	dev = pci_locate_device(PCI_ID(0x1022, 0x746b), 0);
 	if (dev == PCI_DEV_INVALID) {
-		die("SMBUS controller not found\r\n");
+		die("SMBUS controller not found\n");
 	}
 
 	pci_write_config32(dev, 0x58, SMBUS_IO_BASE | 1);
@@ -23,7 +23,7 @@ static void enable_smbus(void)
 
 	/* clear any lingering errors, so the transaction will run */
 	outw(inw(SMBUS_IO_BASE + SMBGSTATUS), SMBUS_IO_BASE + SMBGSTATUS);
-	print_spew("SMBus controller enabled\r\n");
+	print_spew("SMBus controller enabled\n");
 }
 
 static int smbus_recv_byte(unsigned device)
diff --git a/src/southbridge/amd/cs5535/cs5535_early_setup.c b/src/southbridge/amd/cs5535/cs5535_early_setup.c
index c23426e086..583602c3dd 100644
--- a/src/southbridge/amd/cs5535/cs5535_early_setup.c
+++ b/src/southbridge/amd/cs5535/cs5535_early_setup.c
@@ -164,19 +164,19 @@ static int cs5535_early_setup(void)
 	msr = rdmsr(GLCP_SYS_RSTPLL);
 	if (msr.lo & (0x3f << 26)) {
 		/* PLL is already set and we are reboot from PLL reset */
-		print_debug("reboot from BIOS reset\n\r");
+		print_debug("reboot from BIOS reset\n");
 		return;
 	}
-	print_debug("Setup idsel\r\n");
+	print_debug("Setup idsel\n");
 	cs5535_setup_idsel();
-	print_debug("Setup iobase\r\n");
+	print_debug("Setup iobase\n");
 	cs5535_usb_swapsif();
 	cs5535_setup_iobase();
-	print_debug("Setup gpio\r\n");
+	print_debug("Setup gpio\n");
 	cs5535_setup_gpio();
-	print_debug("Setup cis_mode\r\n");
+	print_debug("Setup cis_mode\n");
 	cs5535_setup_cis_mode();
-	print_debug("Setup smbus\r\n");
+	print_debug("Setup smbus\n");
 	cs5535_enable_smbus();
 	dummy();
 }
diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c
index 8a553f57e0..cd8bffa868 100644
--- a/src/southbridge/amd/cs5536/cs5536_early_setup.c
+++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c
@@ -257,18 +257,18 @@ static void cs5536_early_setup(void)
 	msr = rdmsr(GLCP_SYS_RSTPLL);
 	if (msr.lo & (0x3f << 26)) {
 		/* PLL is already set and we are reboot from PLL reset */
-		//print_debug("reboot from BIOS reset\n\r");
+		//print_debug("reboot from BIOS reset\n");
 		return;
 	}
-	//print_debug("Setup idsel\r\n");
+	//print_debug("Setup idsel\n");
 	cs5536_setup_idsel();
-	//print_debug("Setup iobase\r\n");
+	//print_debug("Setup iobase\n");
 	cs5536_usb_swapsif();
 	cs5536_setup_iobase();
-	//print_debug("Setup gpio\r\n");
+	//print_debug("Setup gpio\n");
 	cs5536_setup_gpio();
-	//print_debug("Setup smbus\r\n");
+	//print_debug("Setup smbus\n");
 	cs5536_enable_smbus();
-	//print_debug("Setup power button\r\n");
+	//print_debug("Setup power button\n");
 	cs5536_setup_power_button();
 }
diff --git a/src/southbridge/amd/cs5536/cs5536_early_smbus.c b/src/southbridge/amd/cs5536/cs5536_early_smbus.c
index 298feeed9b..ce8e690567 100644
--- a/src/southbridge/amd/cs5536/cs5536_early_smbus.c
+++ b/src/southbridge/amd/cs5536/cs5536_early_smbus.c
@@ -199,7 +199,7 @@ static unsigned char do_smbus_read_byte(unsigned smbus_io_base,
 	print_debug_hex8(error);
 	print_debug(" device:");
 	print_debug_hex8(device);
-	print_debug("\r\n");
+	print_debug("\n");
 	/* stop, clean up the error, and leave */
 	smbus_stop_condition(smbus_io_base);
 	outb(inb(smbus_io_base + SMB_STS), smbus_io_base + SMB_STS);
diff --git a/src/southbridge/amd/sb600/sb600_early_setup.c b/src/southbridge/amd/sb600/sb600_early_setup.c
index b7581ec352..dd2ed69cd2 100644
--- a/src/southbridge/amd/sb600/sb600_early_setup.c
+++ b/src/southbridge/amd/sb600/sb600_early_setup.c
@@ -44,7 +44,7 @@ static u8 get_sb600_revision(void)
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);
 
 	if (dev == PCI_DEV_INVALID) {
-		die("SMBUS controller not found\r\n");
+		die("SMBUS controller not found\n");
 		/* NOT REACHED */
 	}
 	return pci_read_config8(dev, 0x08);
@@ -290,10 +290,10 @@ static void sb600_devices_por_init(void)
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);
 
 	if (dev == PCI_DEV_INVALID) {
-		die("SMBUS controller not found\r\n");
+		die("SMBUS controller not found\n");
 		/* NOT REACHED */
 	}
-	printk(BIOS_INFO, "SMBus controller enabled, sb revision is 0x%x\r\n",
+	printk(BIOS_INFO, "SMBus controller enabled, sb revision is 0x%x\n",
 		    get_sb600_revision());
 
 	/* sbPorAtStartOfTblCfg */
diff --git a/src/southbridge/amd/sb700/sb700_early_setup.c b/src/southbridge/amd/sb700/sb700_early_setup.c
index 3777bd6288..5d2fde2a4c 100644
--- a/src/southbridge/amd/sb700/sb700_early_setup.c
+++ b/src/southbridge/amd/sb700/sb700_early_setup.c
@@ -51,7 +51,7 @@ static u8 set_sb700_revision(void)
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);
 
 	if (dev == PCI_DEV_INVALID) {
-		die("SMBUS controller not found\r\n");
+		die("SMBUS controller not found\n");
 		/* NOT REACHED */
 	}
 	rev_id =  pci_read_config8(dev, 0x08);
@@ -81,7 +81,7 @@ static u8 set_sb700_revision(void)
 	} else if (rev_id == 0x3D) {
 		rev = 0x15;
 	} else
-		die("It is not SB700 or SB710\r\n");
+		die("It is not SB700 or SB710\n");
 
 	return rev;
 }
@@ -306,10 +306,10 @@ static void sb700_devices_por_init(void)
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);
 
 	if (dev == PCI_DEV_INVALID) {
-		die("SMBUS controller not found\r\n");
+		die("SMBUS controller not found\n");
 		/* NOT REACHED */
 	}
-	printk(BIOS_INFO, "SMBus controller enabled, sb revision is A%x\r\n",
+	printk(BIOS_INFO, "SMBus controller enabled, sb revision is A%x\n",
 		    set_sb700_revision());
 
 	/* sbPorAtStartOfTblCfg */