diff options
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/bootblock.c | 5 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/bootblock.c | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c index 97e8803f48..6925393b06 100644 --- a/src/southbridge/amd/agesa/hudson/bootblock.c +++ b/src/southbridge/amd/agesa/hudson/bootblock.c @@ -77,6 +77,11 @@ void bootblock_soc_early_init(void) hudson_lpc_decode(); enable_acpimmio_decode_pm24(); + if (CONFIG(POST_DEVICE_PCI_PCIE)) + hudson_pci_port80(); + else if (CONFIG(POST_DEVICE_LPC)) + hudson_lpc_port80(); + dev = PCI_DEV(0, 0x14, 3); data = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE); /* enable 0x2e/0x4e IO decoding for SuperIO */ diff --git a/src/southbridge/amd/pi/hudson/bootblock.c b/src/southbridge/amd/pi/hudson/bootblock.c index e9a9d337c4..ec8663dad1 100644 --- a/src/southbridge/amd/pi/hudson/bootblock.c +++ b/src/southbridge/amd/pi/hudson/bootblock.c @@ -79,6 +79,11 @@ void bootblock_soc_early_init(void) else enable_acpimmio_decode_pm04(); + if (CONFIG(POST_DEVICE_PCI_PCIE)) + hudson_pci_port80(); + else if (CONFIG(POST_DEVICE_LPC)) + hudson_lpc_port80(); + dev = PCI_DEV(0, 0x14, 3); data = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE); /* enable 0x2e/0x4e IO decoding for SuperIO */ |