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-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785.c11
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c15
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_ide.c7
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_lpc.c1
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_reset.c1
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_sata.c30
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c4
7 files changed, 22 insertions, 47 deletions
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c
index 7eb4e607c7..3ac28e59ca 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.c
@@ -12,8 +12,7 @@ void bcm5785_enable(device_t dev)
{
device_t sb_pci_main_dev;
device_t bus_dev;
- unsigned index;
- unsigned reg_old, reg;
+ // unsigned index;
/* See if we are on the behind the pcix bridge */
bus_dev = dev->bus->dev;
@@ -23,18 +22,17 @@ void bcm5785_enable(device_t dev)
unsigned devfn;
devfn = bus_dev->path.pci.devfn + (1 << 3);
sb_pci_main_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
-// index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
+ // index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
} else if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
(bus_dev->device == 0x0104)) // device under PCI Bridge( under PCI-X )
{
unsigned devfn;
devfn = bus_dev->bus->dev->path.pci.devfn + (1 << 3);
sb_pci_main_dev = dev_find_slot(bus_dev->bus->dev->bus->secondary, devfn);
-// index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
+ // index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
}
else { // same bus
unsigned devfn;
- uint32_t id;
devfn = (dev->path.pci.devfn) & ~7;
if( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) {
if(dev->device == 0x0036) //PCI-X Bridge
@@ -43,7 +41,7 @@ void bcm5785_enable(device_t dev)
{ devfn -= (1<<3); }
}
sb_pci_main_dev = dev_find_slot(dev->bus->secondary, devfn);
-// index = dev->path.pci.devfn & 7;
+ // index = dev->path.pci.devfn & 7;
}
if (!sb_pci_main_dev) {
return;
@@ -51,6 +49,7 @@ void bcm5785_enable(device_t dev)
// get index now
#if 0
+ unsigned reg_old, reg;
if (index < 16) {
reg = reg_old = pci_read_config16(sb_pci_main_dev, 0x48);
reg &= ~(1 << index);
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
index 66b270cdff..25ad7baf32 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
@@ -6,8 +6,6 @@
static void bcm5785_enable_rom(void)
{
unsigned char byte;
- uint32_t dword;
- uint16_t word;
device_t addr;
/* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */
@@ -109,7 +107,7 @@ static void ldtstop_sb(void)
}
-static void hard_reset(void)
+void hard_reset(void)
{
bcm5785_enable_wdt_port_cf9();
@@ -120,7 +118,7 @@ static void hard_reset(void)
outb(0x0e, 0x0cf9);
}
-static void soft_reset(void)
+void soft_reset(void)
{
bcm5785_enable_wdt_port_cf9();
@@ -164,7 +162,6 @@ static void bcm5785_enable_msg(void)
static void bcm5785_early_setup(void)
{
uint8_t byte;
- uint16_t word;
uint32_t dword;
device_t dev;
@@ -181,13 +178,12 @@ static void bcm5785_early_setup(void)
byte |= (1<<0); // SATA enable
pci_write_config8(dev, 0x84, byte);
-// wdt and cf9 for later in coreboot_ram to call hard_reset
+// WDT and cf9 for later in coreboot_ram to call hard_reset
bcm5785_enable_wdt_port_cf9();
bcm5785_enable_msg();
-#if 1
// IDE related
//F0
byte = pci_read_config8(dev, 0x4e);
@@ -207,9 +203,8 @@ static void bcm5785_early_setup(void)
byte = pci_read_config8(dev, 0x49);
byte |= 1; // enable second channel
pci_write_config8(dev, 0x49, byte);
-#endif
-//F2
+ //F2
dev = pci_locate_device(PCI_ID(0x1166, 0x0234), 0);
byte = pci_read_config8(dev, 0x40);
@@ -218,7 +213,6 @@ static void bcm5785_early_setup(void)
pci_write_config32(dev, 0x60, 0x0000ffff); // LPC Memory hole start and end
-#if 1
// USB related
pci_write_config8(dev, 0x90, 0x40);
pci_write_config8(dev, 0x92, 0x06);
@@ -227,5 +221,4 @@ static void bcm5785_early_setup(void)
pci_write_config8(dev, 0xa5, 0x02); //mask reg - low/full speed func
pci_write_config8(dev, 0xa6, 0x00); //mask reg - high speed func
pci_write_config8(dev, 0xb4, 0x40);
-#endif
}
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_ide.c b/src/southbridge/broadcom/bcm5785/bcm5785_ide.c
index 82263e8ec5..90a41680f6 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_ide.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_ide.c
@@ -12,9 +12,6 @@
static void bcm5785_ide_read_resources(device_t dev)
{
- struct resource *res;
- unsigned long index;
-
/* Get the normal pci resources of this device */
pci_dev_read_resources(dev);
@@ -26,9 +23,6 @@ static void bcm5785_ide_read_resources(device_t dev)
static void ide_init(struct device *dev)
{
- uint16_t word;
-
-
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
@@ -36,6 +30,7 @@ static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
}
+
static struct pci_operations lops_pci = {
.set_subsystem = lpci_set_subsystem,
};
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
index 462d9edf2d..e76dd3a45a 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
@@ -70,7 +70,6 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
unsigned link;
uint32_t reg;
int i;
- int var_num = 0;
reg = pci_read_config8(dev, 0x44);
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_reset.c b/src/southbridge/broadcom/bcm5785/bcm5785_reset.c
index b6fc5926b3..6e05e93711 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_reset.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_reset.c
@@ -4,6 +4,7 @@
*/
#include <arch/io.h>
+#include <reset.h>
#define PCI_DEV(BUS, DEV, FN) ( \
(((BUS) & 0xFFF) << 20) | \
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
index e82fa3ca8e..ec92ecf7e9 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
@@ -12,17 +12,13 @@
#include <arch/io.h>
#include "bcm5785.h"
-
static void sata_init(struct device *dev)
{
-
uint8_t byte;
- uint8_t *base;
- uint8_t *mmio;
+ u32 mmio;
struct resource *res;
- unsigned int mmio_base;
- volatile unsigned int *mmio_reg;
+ u32 mmio_base;
int i;
if(!(dev->path.pci.devfn & 7)) { // only set it in Func0
@@ -31,27 +27,24 @@ static void sata_init(struct device *dev)
pci_write_config8(dev, 0x78, byte);
res = find_resource(dev, 0x24);
- base = res->base;
-
- mmio_base = base;
+ mmio_base = res->base;
mmio_base &= 0xfffffffc;
- mmio_reg = (unsigned int *)( mmio_base + 0x10f0 );
- * mmio_reg = 0x40000001;
- mmio_reg = ( unsigned int *)( mmio_base + 0x8c );
- * mmio_reg = 0x00ff2007;
+
+ write32(mmio_base + 0x10f0, 0x40000001);
+ write32(mmio_base + 0x8c, 0x00ff2007);
mdelay( 10 );
- * mmio_reg = 0x78592009;
+ write32(mmio_base + 0x8c, 0x78592009);
mdelay( 10 );
- * mmio_reg = 0x00082004;
+ write32(mmio_base + 0x8c, 0x00082004);
mdelay( 10 );
- * mmio_reg = 0x00002004;
+ write32(mmio_base + 0x8c, 0x00002004);
mdelay( 10 );
//init PHY
printk(BIOS_DEBUG, "init PHY...\n");
for(i=0; i<4; i++) {
- mmio = base + 0x100 * i;
+ mmio = res->base + 0x100 * i;
byte = read8(mmio + 0x40);
printk(BIOS_DEBUG, "port %d PHY status = %02x\n", i, byte);
if(byte & 0x4) {// bit 2 is set
@@ -62,10 +55,7 @@ static void sata_init(struct device *dev)
printk(BIOS_DEBUG, "after reset port %d PHY status = %02x\n", i, byte);
}
}
-
}
-
-
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c b/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
index 69e077ebb0..a13e9f3fd0 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
@@ -25,8 +25,6 @@ static void sb_init(device_t dev)
uint8_t byte_old;
int nmi_option;
- uint32_t dword;
-
/* Set up NMI on errors */
byte = inb(0x70); // RTC70
byte_old = byte;
@@ -47,7 +45,6 @@ static void sb_init(device_t dev)
static void bcm5785_sb_read_resources(device_t dev)
{
struct resource *res;
- unsigned long index;
/* Get the normal pci resources of this device */
pci_dev_read_resources(dev);
@@ -64,6 +61,7 @@ static void bcm5785_sb_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
}
+
static int lsmbus_recv_byte(device_t dev)
{
unsigned device;
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-26 12:34:58 +0000