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-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c8
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h2
2 files changed, 2 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index c0f62bd7fb..5e28cd2bc2 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -231,12 +231,8 @@ static void pch_power_options(struct device *dev)
reg16 = pci_read_config16(dev, GEN_PMCON_1);
reg16 &= ~(3 << 0); // SMI# rate 1 minute
reg16 &= ~(1 << 10); // Disable BIOS_PCI_EXP_EN for native PME
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in pch.h to debug using
- * periodic SMIs.
- */
- reg16 |= (3 << 0); // Periodic SMI every 8s
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ reg16 |= (3 << 0); // Periodic SMI every 8s
pci_write_config16(dev, GEN_PMCON_1, reg16);
// Set the board's GPI routing.
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 35c7889245..a8c14c96bb 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -40,8 +40,6 @@
#endif
#ifndef __ACPI__
-#define DEBUG_PERIODIC_SMIS 0
-
int pch_silicon_revision(void);
int pch_silicon_type(void);