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Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/Kconfig3
-rw-r--r--src/southbridge/intel/bd82x6x/pcie.c10
2 files changed, 8 insertions, 5 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index 812b6c052e..701c98bf15 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -65,4 +65,7 @@ config HIDE_MEI_ON_ERROR
device will be hidden when ME is in an inoperable mode, e.g.
if me_cleaner was used.
+config PCIEXP_HOTPLUG
+ default y
+
endif
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index f6bffbb3b9..8513390828 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -244,11 +244,11 @@ static void pch_pciexp_scan_bridge(struct device *dev)
{
struct southbridge_intel_bd82x6x_config *config = dev->chip_info;
- /* Normal PCIe Scan */
- pciexp_scan_bridge(dev);
-
- if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
- intel_acpi_pcie_hotplug_scan_slot(dev->link_list);
+ if (CONFIG(PCIEXP_HOTPLUG) && config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
+ pciexp_hotplug_scan_bridge(dev);
+ } else {
+ /* Normal PCIe Scan */
+ pciexp_scan_bridge(dev);
}
/* Late Power Management init after bridge device enumeration */