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-rw-r--r--src/southbridge/intel/bd82x6x/acpi/globalnvs.asl41
-rw-r--r--src/southbridge/intel/bd82x6x/nvs.h33
2 files changed, 2 insertions, 72 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
index 468e07b189..f9944720a8 100644
--- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
@@ -108,47 +108,8 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
/* XHCI */
Offset (0xb2),
XHCI, 8,
- /* IGD OpRegion */
- Offset (0xb4),
- ASLB, 32, // 0xb4 - IGD OpRegion Base Address
- IBTT, 8, // 0xb8 - IGD boot panel device
- IPAT, 8, // 0xb9 - IGD panel type CMOS option
- ITVF, 8, // 0xba - IGD TV format CMOS option
- ITVM, 8, // 0xbb - IGD TV minor format option
- IPSC, 8, // 0xbc - IGD panel scaling
- IBLC, 8, // 0xbd - IGD BLC config
- IBIA, 8, // 0xbe - IGD BIA config
- ISSC, 8, // 0xbf - IGD SSC config
- I409, 8, // 0xc0 - IGD 0409 modified settings
- I509, 8, // 0xc1 - IGD 0509 modified settings
- I609, 8, // 0xc2 - IGD 0609 modified settings
- I709, 8, // 0xc3 - IGD 0709 modified settings
- IDMM, 8, // 0xc4 - IGD Power conservation feature
- IDMS, 8, // 0xc5 - IGD DVMT memory size
- IF1E, 8, // 0xc6 - IGD function 1 enable
- HVCO, 8, // 0xc7 - IGD HPLL VCO
- NXD1, 32, // 0xc8 - IGD _DGS next DID1
- NXD2, 32, // 0xcc - IGD _DGS next DID2
- NXD3, 32, // 0xd0 - IGD _DGS next DID3
- NXD4, 32, // 0xd4 - IGD _DGS next DID4
- NXD5, 32, // 0xd8 - IGD _DGS next DID5
- NXD6, 32, // 0xdc - IGD _DGS next DID6
- NXD7, 32, // 0xe0 - IGD _DGS next DID7
- NXD8, 32, // 0xe4 - IGD _DGS next DID8
- ISCI, 8, // 0xe8 - IGD SMI/SCI mode (0: SCI)
- PAVP, 8, // 0xe9 - IGD PAVP data
- Offset (0xeb),
- OSCC, 8, // 0xeb - PCIe OSC control
- NPCE, 8, // 0xec - native PCIe support
- PLFL, 8, // 0xed - platform flavor
- BREV, 8, // 0xee - board revision
- DPBM, 8, // 0xef - digital port b mode
- DPCM, 8, // 0xf0 - digital port c mode
- DPDM, 8, // 0xf1 - digital port d mode
- ALFP, 8, // 0xf2 - active lfp
- IMON, 8, // 0xf3 - current graphics turbo imon value
- MMIO, 8, // 0xf4 - 64bit mmio support
+ Offset (0xf5),
TPIQ, 8, // 0xf5 - trackpad IRQ value
/* ChromeOS specific */
diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h
index 9dc65c4084..075eae0921 100644
--- a/src/southbridge/intel/bd82x6x/nvs.h
+++ b/src/southbridge/intel/bd82x6x/nvs.h
@@ -96,38 +96,7 @@ typedef struct global_nvs_t {
u8 rsvd11[6];
/* XHCI */
u8 xhci;
- /* IGD OpRegion (not implemented yet) */
- u32 aslb; /* 0xb4 - IGD OpRegion Base Address */
- u8 ibtt; /* 0xb8 - IGD boot type */
- u8 ipat; /* 0xb9 - IGD panel type */
- u8 itvf; /* 0xba - IGD TV format */
- u8 itvm; /* 0xbb - IGD TV minor format */
- u8 ipsc; /* 0xbc - IGD Panel Scaling */
- u8 iblc; /* 0xbd - IGD BLC configuration */
- u8 ibia; /* 0xbe - IGD BIA configuration */
- u8 issc; /* 0xbf - IGD SSC configuration */
- u8 i409; /* 0xc0 - IGD 0409 modified settings */
- u8 i509; /* 0xc1 - IGD 0509 modified settings */
- u8 i609; /* 0xc2 - IGD 0609 modified settings */
- u8 i709; /* 0xc3 - IGD 0709 modified settings */
- u8 idmm; /* 0xc4 - IGD Power Conservation */
- u8 idms; /* 0xc5 - IGD DVMT memory size */
- u8 if1e; /* 0xc6 - IGD Function 1 Enable */
- u8 hvco; /* 0xc7 - IGD HPLL VCO */
- u32 nxd[8]; /* 0xc8 - IGD next state DIDx for _DGS */
- u8 isci; /* 0xe8 - IGD SMI/SCI mode (0: SCI) */
- u8 pavp; /* 0xe9 - IGD PAVP data */
- u8 rsvd12; /* 0xea - rsvd */
- u8 oscc; /* 0xeb - PCIe OSC control */
- u8 npce; /* 0xec - native PCIe support */
- u8 plfl; /* 0xed - platform flavor */
- u8 brev; /* 0xee - board revision */
- u8 dpbm; /* 0xef - digital port b mode */
- u8 dpcm; /* 0xf0 - digital port c mode */
- u8 dpdm; /* 0xf1 - digital port c mode */
- u8 alfp; /* 0xf2 - active lfp */
- u8 imon; /* 0xf3 - current graphics turbo imon value */
- u8 mmio; /* 0xf4 - 64bit mmio support */
+ u8 rsvd12[65];
u8 tpiq; /* 0xf5 - trackpad IRQ value */
u8 rsvd13[10]; /* 0xf6 - rsvd */