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-rw-r--r--src/southbridge/intel/common/pmbase.c13
-rw-r--r--src/southbridge/intel/common/pmutil.h2
2 files changed, 15 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c
index 360b63d9e4..2de57d6da4 100644
--- a/src/southbridge/intel/common/pmbase.c
+++ b/src/southbridge/intel/common/pmbase.c
@@ -14,13 +14,16 @@
*/
#include <stdint.h>
+#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <arch/early_variables.h>
#include <assert.h>
+#include <security/vboot/vboot_common.h>
#include "pmbase.h"
+#include "pmutil.h"
/* LPC PM Base Address Register */
#define PMBASE 0x40
@@ -91,3 +94,13 @@ u8 read_pmbase8(const u8 addr)
return inb(lpc_get_pmbase() + addr);
}
+
+int vboot_platform_is_resuming(void)
+{
+ u16 reg16 = read_pmbase16(PM1_STS);
+
+ if (!(reg16 & WAK_STS))
+ return 0;
+
+ return acpi_sleep_from_pm1(reg16) == ACPI_S3;
+}
diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h
index 273e0f8e9d..26134d9fad 100644
--- a/src/southbridge/intel/common/pmutil.h
+++ b/src/southbridge/intel/common/pmutil.h
@@ -17,6 +17,8 @@
#ifndef INTEL_COMMON_PMUTIL_H
#define INTEL_COMMON_PMUTIL_H
+#include <cpu/x86/smm.h>
+
#define D31F0_PMBASE 0x40
#define D31F0_GEN_PMCON_3 0xa4
#define D31F0_GPIO_ROUT 0xb8