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-rw-r--r--src/southbridge/intel/fsp_bd82x6x/Kconfig33
1 files changed, 2 insertions, 31 deletions
diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig
index f60cbb1e64..fc2b6b36a2 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Kconfig
+++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig
@@ -33,6 +33,8 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select PCIEXP_COMMON_CLOCK
select SPI_FLASH
select COMMON_FADT
+ select HAVE_INTEL_FIRMWARE
+ select USES_INTEL_ME
config EHCI_BAR
hex
@@ -53,35 +55,4 @@ config HPET_MIN_TICKS
hex
default 0x80
-if HAVE_FSP_BIN
-
-config INCLUDE_ME
- bool
- default n
- help
- Include the me.bin and descriptor.bin for Intel PCH.
- This is usually required for the PCH.
-
-config ME_PATH
- string
- depends on INCLUDE_ME
- help
- The path of the ME and Descriptor files.
-
-config LOCK_MANAGEMENT_ENGINE
- bool "Lock Management Engine section"
- default n
- depends on INCLUDE_ME
- help
- The Intel Management Engine supports preventing write accesses
- from the host to the Management Engine section in the firmware
- descriptor. If the ME section is locked, it can only be overwritten
- with an external SPI flash programmer. You will want this if you
- want to increase security of your ROM image once you are sure
- that the ME firmware is no longer going to change.
-
- If unsure, say N.
-
-endif # HAVE_FSP_BIN
-
endif