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Diffstat (limited to 'src/southbridge/intel/fsp_bd82x6x/Makefile.inc')
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/Makefile.inc28
1 files changed, 1 insertions, 27 deletions
diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
index 44144a0302..d96e641670 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
@@ -20,12 +20,7 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X),y)
-# Run an intermediate step when producing coreboot.rom
-# that adds additional components to the final firmware
-# image outside of CBFS
-ifeq ($(CONFIG_INCLUDE_ME),y)
-INTERMEDIATE+=bd82x6x_add_me
-endif
+subdirs-y += ../common/firmware
ramstage-y += pch.c
ramstage-y += azalia.c
@@ -51,27 +46,6 @@ smm-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-y += reset.c
romstage-y += early_spi.c
-bd82x6x_add_me: $(obj)/coreboot.pre $(IFDTOOL)
- printf " DD Adding Intel Firmware Descriptor\n"
- dd if=$(call strip_quotes,$(CONFIG_ME_PATH))/descriptor.bin \
- of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
- printf " IFDTOOL me.bin -> coreboot.pre\n"
- $(objutil)/ifdtool/ifdtool \
- -i ME:$(call strip_quotes,$(CONFIG_ME_PATH))/me.bin \
- $(obj)/coreboot.pre
- mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
-ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
- printf " IFDTOOL Locking Management Engine\n"
- $(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre
- mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
-else
- printf " IFDTOOL Unlocking Management Engine\n"
- $(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre
- mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
-endif
-
-PHONY += bd82x6x_add_me
-
CPPFLAGS_common += -I$(src)/southbridge/intel/fsp_bd82x6x
endif