diff options
Diffstat (limited to 'src/southbridge/intel/fsp_i89xx')
-rw-r--r-- | src/southbridge/intel/fsp_i89xx/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_i89xx/Makefile.inc | 2 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_i89xx/reset.c | 29 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_i89xx/romstage.c | 10 |
4 files changed, 2 insertions, 40 deletions
diff --git a/src/southbridge/intel/fsp_i89xx/Kconfig b/src/southbridge/intel/fsp_i89xx/Kconfig index 9dd62ed742..0bc9586cb2 100644 --- a/src/southbridge/intel/fsp_i89xx/Kconfig +++ b/src/southbridge/intel/fsp_i89xx/Kconfig @@ -23,7 +23,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select IOAPIC - select HAVE_HARD_RESET select HAVE_SMI_HANDLER select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM diff --git a/src/southbridge/intel/fsp_i89xx/Makefile.inc b/src/southbridge/intel/fsp_i89xx/Makefile.inc index d8eb06789f..3d2ab69ee4 100644 --- a/src/southbridge/intel/fsp_i89xx/Makefile.inc +++ b/src/southbridge/intel/fsp_i89xx/Makefile.inc @@ -22,7 +22,6 @@ ramstage-y += sata.c ramstage-y += me.c ramstage-y += me_8.x.c ramstage-y += me_status.c -ramstage-y += reset.c ramstage-y += watchdog.c ramstage-$(CONFIG_ELOG) += elog.c @@ -35,7 +34,6 @@ romstage-y += early_usb.c early_smbus.c early_me.c me_status.c gpio.c early_init romstage-$(CONFIG_USBDEBUG) += usb_debug.c ramstage-$(CONFIG_USBDEBUG) += usb_debug.c smm-$(CONFIG_USBDEBUG) += usb_debug.c -romstage-y += reset.c romstage-y += early_spi.c romstage-y += romstage.c diff --git a/src/southbridge/intel/fsp_i89xx/reset.c b/src/southbridge/intel/fsp_i89xx/reset.c deleted file mode 100644 index b1468da64b..0000000000 --- a/src/southbridge/intel/fsp_i89xx/reset.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * Copyright (C) 2013 Sage Electronic Engineering, LLC. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/io.h> -#include <reset.h> - -void do_soft_reset(void) -{ - outb(0x04, 0xcf9); -} - -void do_hard_reset(void) -{ - outb(0x06, 0xcf9); -} diff --git a/src/southbridge/intel/fsp_i89xx/romstage.c b/src/southbridge/intel/fsp_i89xx/romstage.c index afe00bd6aa..268ea668ba 100644 --- a/src/southbridge/intel/fsp_i89xx/romstage.c +++ b/src/southbridge/intel/fsp_i89xx/romstage.c @@ -31,7 +31,7 @@ #include <console/usb.h> #include <halt.h> #include <program_loading.h> -#include <reset.h> +#include <cf9_reset.h> #include <drivers/intel/fsp1_0/fsp_util.h> #include <northbridge/intel/fsp_sandybridge/northbridge.h> #include <northbridge/intel/fsp_sandybridge/raminit.h> @@ -42,12 +42,6 @@ #include "pch.h" #include "romstage.h" -static inline void reset_system(void) -{ - hard_reset(); - halt(); -} - static void pch_enable_lpc(void) { pci_devfn_t dev = PCH_LPC_DEV; @@ -202,7 +196,7 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) { cbmem_was_initted = !cbmem_recovery(0); if (cbmem_was_initted) { - reset_system(); + system_reset(); } /* Save the HOB pointer in CBMEM to be used in ramstage. */ |