diff options
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/Makefile.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/Makefile.inc b/src/southbridge/intel/fsp_rangeley/Makefile.inc index 48ac522ddd..1d3305288b 100644 --- a/src/southbridge/intel/fsp_rangeley/Makefile.inc +++ b/src/southbridge/intel/fsp_rangeley/Makefile.inc @@ -18,6 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_RANGELEY),y) + # Run an intermediate step when producing coreboot.rom # that adds additional components to the final firmware # image outside of CBFS @@ -48,3 +50,5 @@ rangeley_add_descriptor: $(obj)/coreboot.pre $(IFDTOOL) endif PHONY += rangeley_add_descriptor + +endif |