4 files changed, 0 insertions, 4 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/early_init.c b/src/southbridge/intel/fsp_rangeley/early_init.c
index ba4ebe061c..1ef8cb2add 100644
--- a/src/southbridge/intel/fsp_rangeley/early_init.c
+++ b/src/southbridge/intel/fsp_rangeley/early_init.c
@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <pc80/mc146818rtc.h>
 #include <version.h>
-#include <device/pci_def.h>
 #include "pci_devs.h"
 #include "soc.h"
 
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 726fd3b9ef..3e7c17a74e 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -29,7 +29,6 @@
 #include <elog.h>
 #include <string.h>
 #include <cbmem.h>
-#include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include "soc.h"
 #include "irq.h"
diff --git a/src/southbridge/intel/fsp_rangeley/soc.h b/src/southbridge/intel/fsp_rangeley/soc.h
index 09172016e8..ffadee4bf2 100644
--- a/src/southbridge/intel/fsp_rangeley/soc.h
+++ b/src/southbridge/intel/fsp_rangeley/soc.h
@@ -62,7 +62,6 @@ int soc_silicon_type(void);
 int soc_silicon_supported(int type, int rev);
 void soc_enable(struct device *dev);
 
-#include <arch/acpi.h>
 void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt);
 
 #if IS_ENABLED(CONFIG_ELOG)
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index 98ae708070..97548069ad 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -29,7 +29,6 @@
 static int ich_status_poll(u16 bitmask, int wait_til_set);
 
 #ifdef __SMM__
-#include <arch/io.h>
 #define pci_read_config_byte(dev, reg, targ)\
 	*(targ) = pci_read_config8(dev, reg)
 #define pci_read_config_word(dev, reg, targ)\