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Diffstat (limited to 'src/southbridge/intel/i3100/i3100.h')
| -rw-r--r-- | src/southbridge/intel/i3100/i3100.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/src/southbridge/intel/i3100/i3100.h b/src/southbridge/intel/i3100/i3100.h new file mode 100644 index 0000000000..18c8b33f1a --- /dev/null +++ b/src/southbridge/intel/i3100/i3100.h @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Arastra, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ + +#ifndef SOUTHBRIDGE_INTEL_I3100_I3100_H +#define SOUTHBRIDGE_INTEL_I3100_I3100_H +#include "chip.h" + +void i3100_enable(device_t dev); + +#endif |