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Diffstat (limited to 'src/southbridge/intel/i82371eb/reset.c')
-rw-r--r--src/southbridge/intel/i82371eb/reset.c26
1 files changed, 0 insertions, 26 deletions
diff --git a/src/southbridge/intel/i82371eb/reset.c b/src/southbridge/intel/i82371eb/reset.c
deleted file mode 100644
index 1d1dd640b9..0000000000
--- a/src/southbridge/intel/i82371eb/reset.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include "i82371eb.h"
-
-/**
- * Initiate a hard reset.
- */
-void i82371eb_hard_reset(void)
-{
- outb(SRST | RCPU, RC);
-}