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Diffstat (limited to 'src/southbridge/intel/i82801ca/i82801ca.c')
-rw-r--r--src/southbridge/intel/i82801ca/i82801ca.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/southbridge/intel/i82801ca/i82801ca.c b/src/southbridge/intel/i82801ca/i82801ca.c
index 27432d95fb..11ac82c329 100644
--- a/src/southbridge/intel/i82801ca/i82801ca.c
+++ b/src/southbridge/intel/i82801ca/i82801ca.c
@@ -7,8 +7,8 @@
void i82801ca_enable(device_t dev)
{
- unsigned int index = 0;
- uint8_t bHasDisableBit = 0;
+ unsigned int index = 0;
+ uint8_t bHasDisableBit = 0;
uint16_t cur_disable_mask, new_disable_mask;
// all 82801ca devices are in bus 0
@@ -19,22 +19,22 @@ void i82801ca_enable(device_t dev)
// Calculate disable bit position for specified device:function
// NOTE: For ICH-3, only the following devices can be disabled:
- // D31:F1, D31:F3, D31:F5, D31:F6,
- // D29:F0, D29:F1, D29:F2
+ // D31:F1, D31:F3, D31:F5, D31:F6,
+ // D29:F0, D29:F1, D29:F2
if (PCI_SLOT(dev->path.u.pci.devfn) == 31) {
- index = PCI_FUNC(dev->path.u.pci.devfn);
-
- if ((index == 1) || (index == 3) || (index == 5) || (index == 6))
- bHasDisableBit = 1;
+ index = PCI_FUNC(dev->path.u.pci.devfn);
+
+ if ((index == 1) || (index == 3) || (index == 5) || (index == 6))
+ bHasDisableBit = 1;
} else if (PCI_SLOT(dev->path.u.pci.devfn) == 29) {
- index = 8 + PCI_FUNC(dev->path.u.pci.devfn);
-
- if (PCI_FUNC(dev->path.u.pci.devfn) < 3)
+ index = 8 + PCI_FUNC(dev->path.u.pci.devfn);
+
+ if (PCI_FUNC(dev->path.u.pci.devfn) < 3)
bHasDisableBit = 1;
}
-
+
if (bHasDisableBit) {
cur_disable_mask = pci_read_config16(lpc_dev, FUNC_DIS);
new_disable_mask = cur_disable_mask & ~(1<<index); // enable it
@@ -43,7 +43,7 @@ void i82801ca_enable(device_t dev)
}
if (new_disable_mask != cur_disable_mask) {
pci_write_config16(lpc_dev, FUNC_DIS, new_disable_mask);
- }
+ }
}
}