diff options
Diffstat (limited to 'src/southbridge/intel/i82801cx/lpc.c')
| -rw-r--r-- | src/southbridge/intel/i82801cx/lpc.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801cx/lpc.c b/src/southbridge/intel/i82801cx/lpc.c index 79998bc722..f9c0ece4fe 100644 --- a/src/southbridge/intel/i82801cx/lpc.c +++ b/src/southbridge/intel/i82801cx/lpc.c @@ -42,6 +42,12 @@ static void i82801cx_enable_ioapic(struct device *dev) printk(BIOS_DEBUG, "IOAPIC Southbridge enabled %x\n", reg32); set_ioapic_id(IO_APIC_ADDR, 0x02); + + /* + * Select Boot Configuration register (0x03) and + * use Processor System Bus (0x01) to deliver interrupts. + */ + io_apic_write(IO_APIC_ADDR, 0x03, 0x01); } // This is how interrupts are received from the Super I/O chip |