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-rw-r--r--src/southbridge/intel/i82801dx/i82801dx.c2
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx.h12
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx_early_smbus.c2
3 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c
index 282ccfd247..ac904efa29 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.c
+++ b/src/southbridge/intel/i82801dx/i82801dx.c
@@ -38,7 +38,7 @@ void i82801dx_enable(device_t dev)
// Calculate disable bit position for specified device:function
// NOTE: For ICH-4, only the following devices can be disabled:
- // D31: F0, F1, F3, F5, F6,
+ // D31: F0, F1, F3, F5, F6,
// D29: F0, F1, F2, F7
if (PCI_SLOT(dev->path.pci.devfn) == 31) {
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index 885f9de0f1..1b995b1204 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -20,11 +20,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* the problem: we have 82801dbm support in fb1, and 82801er in fb2.
- * fb1 code is what we want, fb2 structure is needed however.
- * so we need to get fb1 code for 82801dbm into fb2 structure.
+/* the problem: we have 82801dbm support in fb1, and 82801er in fb2.
+ * fb1 code is what we want, fb2 structure is needed however.
+ * so we need to get fb1 code for 82801dbm into fb2 structure.
*/
-/* What I did: took the 80801er stuff from fb2, verify it against the
+/* What I did: took the 80801er stuff from fb2, verify it against the
* db stuff in fb1, and made sure it was right.
*/
@@ -132,9 +132,9 @@ extern void i82801dx_enable(device_t dev);
#define SMBTRNSADD 0x9
#define SMBSLVDATA 0xa
#define SMLINK_PIN_CTL 0xe
-#define SMBUS_PIN_CTL 0xf
+#define SMBUS_PIN_CTL 0xf
-/* Between 1-10 seconds, We should never timeout normally
+/* Between 1-10 seconds, We should never timeout normally
* Longer than this is just painful when a timeout condition occurs.
*/
#define SMBUS_TIMEOUT (100*1000)
diff --git a/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c b/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
index 16c6e11e72..f58cd86342 100644
--- a/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
@@ -32,7 +32,7 @@
#define SMLINK_PIN_CTL 0xe
#define SMBUS_PIN_CTL 0xf
-/* Between 1-10 seconds, We should never timeout normally
+/* Between 1-10 seconds, We should never timeout normally
* Longer than this is just painful when a timeout condition occurs.
*/
//#define SMBUS_TIMEOUT (100*1000*10)