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Diffstat (limited to 'src/southbridge/intel/i82801gx/IOMAP')
| -rw-r--r-- | src/southbridge/intel/i82801gx/IOMAP | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/IOMAP b/src/southbridge/intel/i82801gx/IOMAP new file mode 100644 index 0000000000..6c20f667d7 --- /dev/null +++ b/src/southbridge/intel/i82801gx/IOMAP @@ -0,0 +1,35 @@ +Non-automatic IO-Addresses +-------------------------- + +The following dynamic IO BARs are used on the ICH7 for the Kontron Default BIOS: + +GPIOBASE 0x480 (64 bytes) +PMBASE 0x800 (128 bytes) +SMBASE 0x400 (32 bytes) +HWMON 0xa00 (??) + +The following dynamic IO BARs are used on the ICH7 for the Getac Default BIOS: + +GPIOBASE 0x1180 (64 bytes) +PMBASE 0x1000 (128 bytes) +SMBASE 0x18e0 (32 bytes) + +The Getac also needs an IO Trapped area of 0x0C bytes (defaults to 0x800) + +coreboot: +GPIOBASE 0x480 (64 bytes) +PMBASE 0x500 (128 bytes) +SMBASE 0x400 (32 bytes) +HWMON 0xa00 (??) + + + +NOTE: Coreboot sets the SMBASE to 0xf00 in auto.c. But it gets relocated +in stage2 because its a "normal BAR" (to 0x2080 in one case here). + +This is not unhealthy but at least confusing. We should provide a method to +nail down certain resources for stage2. + +For a list of static I/O space allocation look at 6.3.1 of the ICH7 Family +Datasheet. + |