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Diffstat (limited to 'src/southbridge/intel/i82801gx/bootblock.c')
-rw-r--r--src/southbridge/intel/i82801gx/bootblock.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index 50268b6883..c9c19a3b78 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -30,22 +30,22 @@ static void store_initial_timestamp(void)
static void enable_spi_prefetch(void)
{
- u8 reg8;
- pci_devfn_t dev;
+ u8 reg8;
+ pci_devfn_t dev;
- dev = PCI_DEV(0, 0x1f, 0);
+ dev = PCI_DEV(0, 0x1f, 0);
- reg8 = pci_read_config8(dev, 0xdc);
- reg8 &= ~(3 << 2);
- reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
- pci_write_config8(dev, 0xdc, reg8);
+ reg8 = pci_read_config8(dev, 0xdc);
+ reg8 &= ~(3 << 2);
+ reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
+ pci_write_config8(dev, 0xdc, reg8);
}
static void bootblock_southbridge_init(void)
{
store_initial_timestamp();
- enable_spi_prefetch();
+ enable_spi_prefetch();
/* Enable RCBA */
pci_write_config32(PCI_DEV(0, 0x1f, 0), RCBA, (uintptr_t)DEFAULT_RCBA | 1);