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Diffstat (limited to 'src/southbridge/intel/i82801gx/pcie.c')
-rw-r--r--src/southbridge/intel/i82801gx/pcie.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c
index 56cf1f287d..7a49e52859 100644
--- a/src/southbridge/intel/i82801gx/pcie.c
+++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -50,7 +50,7 @@ static void pci_init(struct device *dev)
/* Set Cache Line Size to 0x10 */
// This has no effect but the OS might expect it
- pci_write_config8(dev, 0x0c, 0x10);
+ pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 0x10);
reg16 = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
reg16 &= ~PCI_BRIDGE_CTL_PARITY;