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Diffstat (limited to 'src/southbridge/intel/i82801jx')
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index a39506976e..3e11a0887a 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -40,8 +40,6 @@
#define NMI_OFF 0
-#define ENABLE_ACPI_MODE_IN_COREBOOT 0
-
typedef struct southbridge_intel_i82801jx_config config_t;
static void i82801jx_enable_apic(struct device *dev)
@@ -375,15 +373,9 @@ static void enable_clock_gating(void)
static void i82801jx_set_acpi_mode(struct device *dev)
{
if (!acpi_is_wakeup_s3()) {
-#if ENABLE_ACPI_MODE_IN_COREBOOT
- printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
- outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
-#else
printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
printk(BIOS_DEBUG, "done.\n");
-#endif
} else {
printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n");
outb(APM_CNT_ACPI_ENABLE, APM_CNT);