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path: root/src/southbridge/intel/lynxpoint/bootblock.c
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Diffstat (limited to 'src/southbridge/intel/lynxpoint/bootblock.c')
-rw-r--r--src/southbridge/intel/lynxpoint/bootblock.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c
index 1a9e7bba61..cb595cdd0c 100644
--- a/src/southbridge/intel/lynxpoint/bootblock.c
+++ b/src/southbridge/intel/lynxpoint/bootblock.c
@@ -14,20 +14,8 @@
*/
#include <arch/io.h>
-#include <cpu/x86/tsc.h>
#include "pch.h"
-static void store_initial_timestamp(void)
-{
- /* On Cougar Point we have two 32bit scratchpad registers available:
- * D0:F0 0xdc (SKPAD)
- * D31:F2 0xd0 (SATA SP)
- */
- tsc_t tsc = rdtsc();
- pci_write_config32(PCI_DEV(0, 0x00, 0), 0xdc, tsc.lo);
- pci_write_config32(PCI_DEV(0, 0x1f, 2), 0xd0, tsc.hi);
-}
-
/*
* Enable Prefetching and Caching.
*/
@@ -83,8 +71,6 @@ static void set_spi_speed(void)
static void bootblock_southbridge_init(void)
{
- store_initial_timestamp();
-
map_rcba();
enable_spi_prefetch();
enable_port80_on_lpc();