summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r--src/southbridge/intel/lynxpoint/Kconfig1
-rw-r--r--src/southbridge/intel/lynxpoint/smi.c6
2 files changed, 4 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index c65e5d7c32..646d480dd8 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -34,6 +34,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select HAVE_SPI_CONSOLE_SUPPORT
select RTC
select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP
+ select HAVE_INTEL_CHIPSET_LOCKDOWN
config INTEL_LYNXPOINT_LP
bool
diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c
index 5f1bdf76fa..386451f03e 100644
--- a/src/southbridge/intel/lynxpoint/smi.c
+++ b/src/southbridge/intel/lynxpoint/smi.c
@@ -121,13 +121,13 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
}
/*
- * Finalize system before payload boot if not in ChromeOS environment.
+ * Finalize system before payload boot if INTEL_CHIPSET_LOCKDOWN=y
*/
-#if !IS_ENABLED(CONFIG_CHROMEOS)
+#if IS_ENABLED(CONFIG_INTEL_CHIPSET_LOCKDOWN)
static void finalize_boot(void *unused)
{
- outb(0xcb, 0xb2);
+ outb(APM_CNT_FINALIZE, APM_CNT);
}
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL);