diff options
Diffstat (limited to 'src/southbridge/intel/sch/chip.h')
| -rw-r--r-- | src/southbridge/intel/sch/chip.h | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/src/southbridge/intel/sch/chip.h b/src/southbridge/intel/sch/chip.h deleted file mode 100644 index 0c1c91ead6..0000000000 --- a/src/southbridge/intel/sch/chip.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef SOUTHBRIDGE_INTEL_SCH_CHIP_H -#define SOUTHBRIDGE_INTEL_SCH_CHIP_H - -struct southbridge_intel_sch_config { - /** - * Interrupt Routing configuration - * If bit7 is 1, the interrupt is disabled. - */ - uint8_t pirqa_routing; - uint8_t pirqb_routing; - uint8_t pirqc_routing; - uint8_t pirqd_routing; - uint8_t pirqe_routing; - uint8_t pirqf_routing; - uint8_t pirqg_routing; - uint8_t pirqh_routing; -}; - -#endif |