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Diffstat (limited to 'src/southbridge/intel/sch/south.c')
-rw-r--r--src/southbridge/intel/sch/south.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/src/southbridge/intel/sch/south.c b/src/southbridge/intel/sch/south.c
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index 0000000000..e7c283f9a8
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+++ b/src/southbridge/intel/sch/south.c
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+
+struct chip_operations southbridge_intel_sch_ops = {
+ CHIP_NAME("Intel SCH Southbridge")
+};
+