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Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/pcie.c7
-rw-r--r--src/southbridge/intel/i3100/pciexp_portb.c5
-rw-r--r--src/southbridge/intel/i82801ix/pcie.c7
3 files changed, 7 insertions, 12 deletions
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 42a8578b1d..1b8ac76126 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -273,13 +273,12 @@ static void pch_pcie_enable(device_t dev)
pch_pcie_pm_early(dev);
}
-static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)
+static void pch_pciexp_scan_bridge(device_t dev)
{
- unsigned int ret;
struct southbridge_intel_bd82x6x_config *config = dev->chip_info;
/* Normal PCIe Scan */
- ret = pciexp_scan_bridge(dev, max);
+ pciexp_scan_bridge(dev);
if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
intel_acpi_pcie_hotplug_scan_slot(dev->link_list);
@@ -287,8 +286,6 @@ static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)
/* Late Power Management init after bridge device enumeration */
pch_pcie_pm_late(dev);
-
- return ret;
}
static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device)
diff --git a/src/southbridge/intel/i3100/pciexp_portb.c b/src/southbridge/intel/i3100/pciexp_portb.c
index 815c0812d4..41e921c6f5 100644
--- a/src/southbridge/intel/i3100/pciexp_portb.c
+++ b/src/southbridge/intel/i3100/pciexp_portb.c
@@ -39,7 +39,7 @@ static void pcie_init(struct device *dev)
{
}
-static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
+static void pcie_scan_bridge(struct device *dev)
{
u16 val;
u16 ctl;
@@ -56,7 +56,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
hard_reset();
}
} while (val & (3<<10));
- return pciexp_scan_bridge(dev, max);
+
+ pciexp_scan_bridge(dev);
}
static struct device_operations pcie_ops = {
diff --git a/src/southbridge/intel/i82801ix/pcie.c b/src/southbridge/intel/i82801ix/pcie.c
index 58c0e19c85..5858176baa 100644
--- a/src/southbridge/intel/i82801ix/pcie.c
+++ b/src/southbridge/intel/i82801ix/pcie.c
@@ -110,19 +110,16 @@ static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
-static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)
+static void pch_pciexp_scan_bridge(device_t dev)
{
- unsigned int ret;
struct southbridge_intel_i82801ix_config *config = dev->chip_info;
/* Normal PCIe Scan */
- ret = pciexp_scan_bridge(dev, max);
+ pciexp_scan_bridge(dev);
if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
intel_acpi_pcie_hotplug_scan_slot(dev->link_list);
}
-
- return ret;
}
static struct pci_operations pci_ops = {