diff options
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 32 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/spi.c | 32 |
2 files changed, 26 insertions, 38 deletions
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 7e0cc201c7..42a2a748de 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -285,13 +285,6 @@ static void ich_set_bbar(uint32_t minaddr) writel_(ichspi_bbar, cntlr.bbar); } -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - return 0; -} - void spi_init(void) { uint8_t *rcrb; /* Root Complex Register Block */ @@ -348,17 +341,6 @@ static void spi_init_cb(void *unused) BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL); -int spi_claim_bus(const struct spi_slave *slave) -{ - /* Handled by ICH automatically. */ - return 0; -} - -void spi_release_bus(const struct spi_slave *slave) -{ - /* Handled by ICH automatically. */ -} - typedef struct spi_transaction { const uint8_t *out; uint32_t bytesout; @@ -527,7 +509,7 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len) return min(cntlr.databytes, buf_len); } -int spi_xfer(const struct spi_slave *slave, const void *dout, +static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin) { uint16_t control; @@ -675,6 +657,18 @@ int spi_xfer(const struct spi_slave *slave, const void *dout, return 0; } +static const struct spi_ctrlr spi_ctrlr = { + .xfer = spi_ctrlr_xfer, +}; + +int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) +{ + slave->bus = bus; + slave->cs = cs; + slave->ctrlr = &spi_ctrlr; + return 0; +} + /* Sets FLA in FADDR to (addr & 0x01FFFFFF) without touching other bits. */ static void ich_hwseq_set_addr(uint32_t addr) { diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c index de676a9dfa..acdb0729c7 100644 --- a/src/southbridge/intel/fsp_rangeley/spi.c +++ b/src/southbridge/intel/fsp_rangeley/spi.c @@ -322,13 +322,6 @@ static void ich_set_bbar(uint32_t minaddr) writel_(ichspi_bbar, cntlr.bbar); } -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - return 0; -} - /* * Check if this device ID matches one of supported Intel SOC devices. * @@ -420,17 +413,6 @@ void spi_init(void) } } -int spi_claim_bus(const struct spi_slave *slave) -{ - /* Handled by ICH automatically. */ - return 0; -} - -void spi_release_bus(const struct spi_slave *slave) -{ - /* Handled by ICH automatically. */ -} - typedef struct spi_transaction { const uint8_t *out; uint32_t bytesout; @@ -592,7 +574,7 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len) return min(cntlr.databytes, buf_len); } -int spi_xfer(const struct spi_slave *slave, const void *dout, +static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin) { uint16_t control; @@ -739,3 +721,15 @@ spi_xfer_exit: return 0; } + +static const struct spi_ctrlr spi_ctrlr = { + .xfer = spi_ctrlr_xfer, +}; + +int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) +{ + slave->bus = bus; + slave->cs = cs; + slave->ctrlr = &spi_ctrlr; + return 0; +} |