diff options
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/usb_debug.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/usb_debug.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/usb_debug.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/sch/usb_debug.c | 1 |
4 files changed, 0 insertions, 4 deletions
diff --git a/src/southbridge/intel/bd82x6x/usb_debug.c b/src/southbridge/intel/bd82x6x/usb_debug.c index e075a76195..38f144b02a 100644 --- a/src/southbridge/intel/bd82x6x/usb_debug.c +++ b/src/southbridge/intel/bd82x6x/usb_debug.c @@ -38,7 +38,6 @@ void enable_usbdebug(unsigned int port) pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); /* Force ownership of the Debug Port to the EHCI controller. */ - printk(BIOS_DEBUG, "Enabling OWNER_CNT\n"); dbgctl = read32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET); dbgctl |= (1 << 30); write32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET, dbgctl); diff --git a/src/southbridge/intel/i82801gx/usb_debug.c b/src/southbridge/intel/i82801gx/usb_debug.c index f447f7bb84..bdea889854 100644 --- a/src/southbridge/intel/i82801gx/usb_debug.c +++ b/src/southbridge/intel/i82801gx/usb_debug.c @@ -45,7 +45,6 @@ void enable_usbdebug(unsigned int port) pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); /* Force ownership of the Debug Port to the EHCI controller. */ - printk(BIOS_DEBUG, "Enabling OWNER_CNT\n"); dbgctl = read32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET); dbgctl |= (1 << 30); write32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET, dbgctl); diff --git a/src/southbridge/intel/lynxpoint/usb_debug.c b/src/southbridge/intel/lynxpoint/usb_debug.c index d8da7b5484..022cde3736 100644 --- a/src/southbridge/intel/lynxpoint/usb_debug.c +++ b/src/southbridge/intel/lynxpoint/usb_debug.c @@ -42,7 +42,6 @@ void enable_usbdebug(unsigned int port) pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); /* Force ownership of the Debug Port to the EHCI controller. */ - printk(BIOS_DEBUG, "Enabling OWNER_CNT\n"); dbgctl = read32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET); dbgctl |= (1 << 30); write32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET, dbgctl); diff --git a/src/southbridge/intel/sch/usb_debug.c b/src/southbridge/intel/sch/usb_debug.c index 4189716c08..fb436b5af7 100644 --- a/src/southbridge/intel/sch/usb_debug.c +++ b/src/southbridge/intel/sch/usb_debug.c @@ -41,7 +41,6 @@ void enable_usbdebug(unsigned int port) pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); /* Force ownership of the Debug Port to the EHCI controller. */ - printk(BIOS_DEBUG, "Enabling OWNER_CNT\n"); dbgctl = read32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET); dbgctl |= (1 << 30); write32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET, dbgctl); |